BOP-1K-GL 111315
3-49
A zero to one transition of a condition register is added to the event register. Reading an event
register clears all of the bits found in the event register. If any bits are set in an event register,
the following condition register bit is then set. For example, if the STAT:QUES:ENB (enable) reg-
ister has bit 0 set and a voltage error is detected, the event registers bit 0 is set. The 1 in the
event register causes bit 3 of the status byte to be asserted. The Service Request register is
ANDed with its enable register for all bits except bit 6. The result is placed in bit 6 of the Service
Request register. If bit 6 is a 1 (true), it causes the MBT-G power supply to assert the SRQ line
to the host controller.
Figure 3-11 also shows that if the error/event queue is not empty, bit 3 is set in the Service
Request register and bit 4 indicates that a message is available in the output buffer.
3.7.7.2
OPERATIONAL STATUS REGISTER
The OPERational condition register contains conditions which are a part of the instrument’s nor-
mal operation. The definition of each of these bits (condition register) is as follows:
•
0 through 4 - Not Used — always zero.
•
5 - Waiting for Trigger — 1 indicates the trigger system is enabled. If trigger source is
external and the trigger input goes low, the WTG will remain in a one condition until
after the trigger input goes high.
•
6 - Transient Armed — 1 indicates the transient function is enabled,
•
7 - Not Used — always zero.
•
8 - Constant Voltage — 1 indicates the instrument is in constant voltage mode.
•
9 - Transient Complete — 1 indicates transient has been completed. Not readable in
OPERation Status Condition register.
•
10 - Constant Current — 1 indicates the instrument is in constant current mode.
•
11 - Sample Complete — 1 indicates the sample has been completed.
•
12 - List Complete — 1 indicates the programmed list has been completed. Not readable
in OPERation Status Condition register.
•
13 - Not Used — always zero.
•
14 - List Running — 1 indicates the programmed list is in progress.
•
15 - Not Used — always zero.
3.7.7.3
QUESTIONABLE STATUS REGISTER
The QUEStionable condition register (see Figure 3-11) contains status bits representing
data/signals which give an indication of the quality of various aspects of the signal.
A bit set in the QUEStionable condition register indicates that the data currently being acquired
or generated is of questionable quality due to some condition affecting the parameter associ-
ated with that bit.
•
0 - Voltage Mode Error — 1 indicates the instrument is in Current mode.
•
1 - Current Mode Error — 1 indicates the Power Supply is in Voltage mode.
•
2 - Not Used — always zero.
•
3 - Thermal Error — 1 indicates a thermal error has been detected.
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