4-30
888-2463-001
3/6/08
WARNING: Disconnect primary power prior to servicing.
Diamond Series™
Section 4 Theory of Operation
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2-disables AGC
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3-disables normal fault strike (so 1 fault=OFF)
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4-store default enable-configuration
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5-NA
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6-NA
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7-NA
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8-reset microprocessor
4.9.1.6
I and Q vectors
The 12 bit digital to analog convertor, U21, sends analog voltages to the phase and gain
board to adjust the RF modules’ output. Voltages 0 to 4.096 volts correspond to the
input digital word from the micro.
4.9.2
Phase and Gain Circuit Description
The RF signal enters the assembly at J2. An input step adjustable line length assembly
(not shown on the schematic) provides a means of adjusting the nominal phase shift
through the module. CR6, CR11, VR1 and VR2 form a bi-directional clamp to protect
the module from overload signals. L1 and L2 form a filter in conjunction with the
capacitance of the diodes to maintain a 50 ohm condition in the TV band.
T5 splits the input signal path into two paths: The main path and the detector path.
CR12 and U3 in the detector path detect the input signal and amplify / buffer the
resulting DC signal. R62 provides adjustment of the scaling. The buffers output is
available on I/O connector J1-2, Input Power Sample Average. A similar output circuit
but with out filtering is on connector J1-4, Input Overdrive Level.
A temperature compensating attenuator R123 in the main path provides the overall gain
of this path and compensating for gain variations with temperature.
A Single Quadrant Vector Modulator, consisting of T4, T3, T2, and T1 and associated
circuitry provide for assembly gain and phase control.
Quadrature Hybrid T4 splits the modulator input signal in to 0 degree and -90 degree
paths.
Quadrature Hybrids T2 and T3 and associated components act as attenuators in each of
these paths.
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