Function parameter schedule graph
38
switching Forward and reverse )
47: Frequency inverter running 1(not jog running)
48: Analog input disconnection signal output
49: X1 Terminal closed valid
50: X2 Terminal closed valid
51~60: Reserved
F09.01 Open
collector
output terminal Y2
output setup
Same as above
1
0
×
F09.02 Open
collector
output terminal Y3
output setup
Same as above
1
0
×
F09.03 Open
collector
output terminal Y4
output setup
Same as above
1
0
×
F09.04 PLY1
output
setting
Same as above
1
22
×
F09.05 Detection
amplitude of
Frequency
arrival(FAR)
0.00
~
50.00Hz 0.01Hz 5.00Hz
○
F09.06 FDT1
(Frequency
level) level
0.00Hz
~
upper limit frequency
0.01Hz 10.00Hz
○
F09.07 FDT1
lag
0.00
~
50.00Hz 0.01Hz 1.00Hz
○
F09.08 FDT2(frequency
level) level
0.00Hz
~
upper limit frequency
0.01Hz 10.00Hz
○
F09.09 FDT2
lag
0.00
~
50.00Hz 0.01Hz 1.00Hz
○
F09.10 Zero
frequency
signal detection
value
0.00Hz
~
upper limit frequency
0.01Hz 0.40Hz
○
F09.11 Zero
frequency
backlash
0.00Hz
~
upper limit frequency
0.01Hz 0.10Hz
○
F09.12 Zero-current
detection amplitude
0.0
~
50.0% 0.1%
0.0%
○
F09.13 Zero-current
detection time
0.00
~
60.00s 0.01s
0.1s
○
F09.14 Over-current
detection value
0.0
~
250.0% 0.1%
160.0%
○
F09.15 Over-current
detection time
0.00
~
60.00s 0.01s
0.00s
○
F09.16 Current
1
arrival
detection value
0.0
~
250.0% 0.1%
100.0%
○
F09.17 Current
1
width 0.0
~
100.0% 0.1%
0.0%
○
F09.18 Current
2
arriving
the detection value
0.0
~
250.0% 0.1%
100.0%
○
F09.19 Current
2
width 0.0
~
100.0% 0.1%
0.0%
○
F09.20 Frequency
1
arriving the
detection value
0.00Hz
~
upper limit frequency
0.01Hz 50.00Hz
○
F09.21 Frequency
1
arriving the
detection width
0.00Hz
~
upper limit frequency
0.01Hz 0.00Hz
○
F09.22 Frequency
2
arriving the
detection value
0.00Hz
~
upper limit frequency
0.01Hz 50.00Hz
○
F09.23 Frequency
2
0.00Hz
~
upper limit frequency
0.01Hz 0.00Hz
○
ENC