Copley Controls Accelnet Plus AEV-090-14, Руководство пользователя

Страница: 101 / 139

Accelnet Plus Micro Modules User Guide 16-01687 Rev 03
Copley Controls Page 101 of 139
PC B
OARD
D
ESIGN FOR
STO
G
ENERAL
C
ONSIDERATIONS
The general PCB design guidelines presented in section 4.4 must be considered in addition to
the following STO guidelines for any User Mounted Board (UMB).
STO C
IRCUITS
Z
ONE
• High-voltage & current: Input from the DC power supply and output to motor windings.
• Low-voltage: Signals, Input/Output, communications, motor feedback
• Safety STO inputs
STO C
IRCUITS
C
REEPAGE
& C
LEARANCE FOR
O
UTER
L
AYERS OF
PC B
OARDS
• No conformal coating
• Creepage and clearance based on standard IEC 60664-1
• Dominant requirement: Fault Exclusion against short circuits.
Description
Creepage &
Clearance
Between adjacent STO circuits 0.200 mm
Between STO circuits and control circuits 0.630 mm
Between STO circuits and chassis 0.200 mm
STO
C
IRCUITS
C
REEPAGE
& C
LEARANCE FOR
I
NNER
L
AYERS OF
PC B
OARDS
• No conformal coating
• Creepage and clearance based on standard IEC 60664-1
• Dominant requirement: Fault Exclusion against short circuits.
Description
Creepage &
Clearance
Between adjacent STO circuits 0.200 mm
Between STO circuits and control circuits 0.500 mm
Between STO circuits and chassis 0.200 mm
This graphic shows the traces from
the EZ board as an example of the
zones on the UMB that have
different rules for spacings, etc.
Seven high-current traces are used
for the +HV, HVCOM, and the Motor
U, V, and W outputs.
Traces used on EZ board are paired
on top and bottom layers, connected
by vias.
This gives a 3 oz, 0.50 inch width
combination.