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UG-1262
Rev. B | Page 25 of 312
POWER MANAGEMENT UNIT
AVDD_DD
AFE DIE
DIGITAL DIE
2.8V TO 3.6V POWER SUPPLY
FOR DIGITAL DIE OSCILLATOR,
POWER-ON RESET (POR)
AND OTHER ANALOG CIRCUITS
DVDD
BUCK
CONVERTOR
DVDD
V
DCDC_
CAP
O
UT
V
DCDC_
CAP
1N
V
DCDC
_CAP
1P
V
DCDC_
CAP
2N
V
DCDC
_CAP
2P
DVDD
DIGITAL
DIE 3V
SUPPLY
MAIN DIGITAL DIE 3V
POWER SUPPLY FOR FLASH
AND OTHER DIGITAL BLOCKS
PMG_CTL1[0]
0
1
1.2V
LDO
DVDD_REG
MAIN DIGITAL DIE 1.2V
POWER SUPPLY FOR
CORTEX-M3, SRAM, FLASH
AND OTHER DIGITAL BLOCKS
DIGITAL
DIE 3V
SUPPLY
1.8V
DIGITAL
LDO
DVDD
DVDD_REG_AD
MAIN ANALOG DIE 1.8V
DIGITAL POWER SUPPLY
FOR AFE DIE DIGITAL LOGIC
2.8V TO 3.6V POWER SUPPLY
FOR ANALOG DIE CRITICAL
SUPPLY FOR ANALOG CIRCUITS
1.8V
ANALOG
LDO
AVDD
REGULATED ANALOG DIE 1.8V
ANALOG POWER SUPPLY FOR
AFE DIE REFERENCES AND
OTHER CRITICAL ANALOG BLOCKS
AVDD
AVDD_REG
16
67
5-
004
Figure 3. Power Supply Architecture Block Diagram
POWER MANAGEMENT UNIT FEATURES
The
contains two separate PMUs, one for each die. The PMUs control the different power modes of each
The power management features of the device include the following:
High efficiency buck converters to reduce power on the digital die.
Buck converter for active mode, which requires external flying capacitors, as shown in the Figure 3. The buck converter is
disabled by default. For optimal performance of the analog peripherals, leave the converter disabled.
The dc-to-dc converter shown on the digital die is optional. If disabled, the three capacitors connected to the VDCDC_x pins
are not required and these five pins can be left unconnected.
Customized clock gating for active modes.
Power gating to reduce leakage in sleep modes.
Voltage monitoring.
Flexible sleep modes with smart peripherals.
Deep sleep modes with no retention.
Three power modes are available: active mode, Flexi mode, and hibernate mode. The power mode control for each die is separate.
Active Mode
The Arm Cortex-M3 is executing from flash and SRAM on the digital die. PMG0 PWRMOD, Bits[1:0] = 00. The analog die circuitry is in
active mode. ALLON PWRMOD, Bits[1:0] = 01.