eZ8 CPU
User Manual
UM012811-0904
Addressing
Modes
20
Addressing Modes
INTRODUCTION
The eZ8 CPU provides six addressing modes:
•
Register (R)
•
Indirect Register (IR)
•
Indexed (X)
•
Direct (DA)
•
Relative (RA)
•
Immediate Data (IM)
With the exception of immediate data and condition codes, all operands are expressed as
either Register File, Program Memory, or Data Memory addresses. Registers use 12-bit
addresses in the range of
000H
-
FFFH
. Program Memory and Data Memory use 16-bit
addresses (register pairs) in the range of
0000H
-
FFFFH
.
Register pairs can designate 16-bit values or memory addresses. Working Register Pairs
use 4-bit addresses and must be specified as an even-numbered address in the range of 0,
2, ..., 14. Register Pairs use 8-bit addresses and must be specified as an even-numbered
address in the range of 0, 2, ..., 254.
In the following definitions of Addressing Modes, the use of 'register' can imply a Regis-
ter, a Register Pair, a Working Register, or a Working Register pair, depending on the con-
text.
Refer to the device-specific Product Specification for details of the Program, Data, and
Register File memory types and address ranges available.
REGISTER ADDRESSING (R)
Register Addressing Using 12-Bit Addresses
Extended register addressing is used to directly access any register in the Register File.
The 12-bit address is supplied in the operands. There are two types of extended mode
instructions: Register to Register operations and Immediate to Register operations.
Figure 8 illustrates Register addressing using 12-bit addresses.
