UM012811-0904
eZ8 CPU Instruction Set Description
eZ8 CPU
User Manual
165
SBC
Subtract with Carry
SBC dst, src
Operation
dst
←
dst - src - C
Description
This instruction subtracts the source operand and the Carry (C) flag from the destination.
The destination stores the result. The contents of the source operand are unaffected. The
eZ8 CPU performs subtraction by adding the two’s-complement of the source operand to
the destination operand. In multiple-precision arithmetic, this instruction permits the carry
(borrow) from the subtraction of low-order operands to be subtracted from the subtraction
of high-order operands.
Flags
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address modes R or IR can specify a Working Register.
If the high nibble of the source or destination address is
EH
(1110B), a Working Register is
inferred. For example, if Working Register R12 (
CH
) is the desired destination operand,
use
ECH
as the destination operand in the opcode. To access Registers with addresses
E0H
to
EFH
, either set the Working Group Pointer, RP[7:4], to
EH
or use indirect addressing.
C
Set if a borrow is required by bit 7; reset otherwise.
Z
Set if the result is zero; reset otherwise.
S
Set if Bit 7 of the result is set; reset otherwise.
V
Set if an arithmetic overflow occurs; reset otherwise.
D
Set to 1.
H
Set if a borrow is required by bit 3; reset otherwise.
Mnemonic
Destination, Source
Opcode (Hex)
Operand 1
Operand 2
Operand 3
SBC
r1, r2
32
{r1, r2}
—
—
SBC
r1, @r2
33
{r1, r2}
—
—
SBC
R1, R2
34
R2
R1
—
SBC
R1, @R2
35
R2
R1
—
SBC
R1, IM
36
R1
IM
—
SBC
@R1, IM
37
R1
IM
—
