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eZ8 CPU
User Manual
14
General-Purpose Registers
Other than the upper 256 registers reserved for control functions, all other available
addresses within the Register File are available for general-purpose use. Refer to the
device-specific Product Specification to determine the addresses available.
Register File Organization
The Register File can be accessed as a 4096 byte linear address space using 12-bit address-
ing mode, as sixteen 256-byte Register Pages using 8-bit addressing mode, or as sixteen
16-byte Working Register Groups per Register Page using 4-bit addressing mode. Figure 3
illustrates the organization of the Register File. Attempts to read unavailable Register File
addresses return an undefined value. Attempts to write to unavailable Register File
addresses produce no effect.
Table 6. eZ8 CPU Control Registers
Register
Mnemonic
Register Description
Address
(Hex)
FLAGS
Flags
FFC
RP
Register Pointer
FFD
SPH
Stack Pointer High Byte
FFE
SPL
Stack Pointer Low Byte
FFF
