UM012811-0904
eZ8 CPU Instruction Set Description
eZ8 CPU
User Manual
93
CPC
Compare with Carry
CPC dst, src
Operation
dst - src - C
Description
The source operand with the C bit is compared to (subtracted from) the destination oper-
and. The contents of both operands are unaffected. For multi-precision operation, repeat-
ing this instruction enables multi-byte compares. The Zero flag is set only if the initial
state of the Zero flag is 1 and the result of the compare is 0.
Flags
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address modes R or IR can specify a Working Register.
If the high nibble of the source or destination address is
EH
(1110B), a Working Register is
inferred. For example, if Working Register R12 (
CH
) is the desired destination operand,
use
ECH
as the destination operand in the opcode. To access Registers with addresses
E0H
to
EFH
, either set the Working Group Pointer, RP[7:4], to
EH
or use indirect addressing.S
C
Set if a borrow is required by bit 7; reset otherwise.
Z
Set if the result is zero and the initial Zero flag is 1; reset otherwise.
S
Set if the result is negative; reset otherwise.
V
Set if an arithmetic overflow occurs; reset otherwise.
D
Unaffected.
H
Unaffected.
Mnemonic
Destination, Source
Opcode (Hex)
Operand 1
Operand 2
Operand 3
CPC
r1, r2
1F A2
{r1, r2}
—
—
CPC
r1, @r2
1F A3
{r1, r2}
—
—
CPC
R1, R2
1F A4
R2
R1
—
CPC
R1, @R2
1F A5
R2
R1
—
CPC
R1, IM
1F A6
R1
IM
—
CPC
@R1, IM
1F A7
R1
IM
—
