eZ8 CPU
User Manual
UM012811-0904
Architectural
Overview
1
Architectural Overview
FEATURES
The eZ8 is ZiLOG’s latest 8-bit central processing unit (CPU) designed to meet the con-
tinuing demand for faster and more code-efficient microcontrollers. The eZ8 CPU exe-
cutes a superset of the original Z8
®
instruction set. The features of the eZ8 CPU include:
•
Direct register-to-register architecture allows each register to function as an
accumulator. This improves execution time and decreases the required program
memory.
•
Software stack allows much greater depth in subroutine calls and interrupts than
hardware stacks.
•
Compatible with Z8
®
assembly instruction set.
•
Expanded internal Register File allows access of up to 4KB.
•
New instructions improve execution efficiency for code developed using higher-level
programming languages including C.
•
Pipelined instruction fetch and execution
PROCESSOR DESCRIPTION
The eZ8 CPU contains two major functional blocks - the Fetch Unit and the Execution
Unit. The Execution Unit is further subdivided into the Instruction State Machine, Pro-
gram Counter, CPU Control Registers, and Arithmetic Logic Unit (ALU). Figure 1 illus-
trates the eZ8 CPU architecture.
