UM012811-0904
Addressing
Modes
eZ8 CPU
User Manual
23
Figure 10. Register Addressing Using 4-Bit Addresses
Escaped Mode Addressing
Escaped Mode Addressing with 8-bit Addresses
Using Escaped Mode Addressing 12-bit addresses can specify a Working Register. If the
high nibble of the 8-bit address is
EH
(1110b), a Working Register is inferred. For exam-
ple, if Working Register R12 (
CH
) is the desired destination operand, use
ECH
as the 8-bit
address operand in the opcode. To access Registers with addresses
E0H
to
EFH
, either set
the Working Group Pointer, RP[7:4], to
EH
or use indirect addressing.
Escaped Mode Addressing with 12-bit Addresses
Using Escaped Mode Addressing, address mode ER for the source or destination can spec-
ify a Working Register with 4-bit addressing.
If the high byte of the source or destination address is EEH (11101110B), a Working Reg-
ister is inferred. For example, the operand EE3H selects Working Register R3. The full 12-
bit address is given by {RP[3:0], RP[7:4], 3H}.
To access Registers on Page EH (addresses E00H to EFFH), set the Page Pointer, RP[3:0],
to EH and set the Working Group Pointer, RP[7:4], to the desired Working Group.
Two 4-bit
Program Memory
Addresses
(dst, src)
One Operand
Instruction
(Example)
Opcode
{dst[3:0],
12-bit address is
{RP[3:0], RP[7:4], dst[3:0]}
src[3:0]}
Source
Destination
Register
Register
Register File
12-bit address is
{RP[3:0], RP[7:4], src[3:0]}
