UM012811-0904
eZ8 CPU Instruction Set Description
eZ8 CPU
User Manual
114
INCW
Increment Word
INCW dst
Operation
dst
←
dst + 1
Description
The 16-bit value indicated by the destination operand is incremented by one. Only even
addresses can be used for the register pair. For indirect addressing, the indirect address can
be any value, but the effective address can only be an even address.
Flags
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address modes RR can specify a Working Register Pair
or IR can specify a Working Register. If the high nibble of the source or destination
address is EH (1110B), a Working Register (or Pair) is inferred. For example, if Working
Register Pair R12 and R13 (with base address CH) is the desired destination operand, use
ECH as the destination operand in the opcode. To access Register Pairs with addresses
E0H to EFH, either set the Working Group Pointer, RP[7:4], to EH or use indirect address-
ing.
C
Unaffected.
Z
Set if the result is zero; reset otherwise.
S
Set if Bit 7 of the result is set; reset otherwise.
V
Set if an arithmetic overflow occurs; reset otherwise.
D
Unaffected.
H
Unaffected.
Mnemonic
Destination
Opcode (Hex)
Operand 1
Operand 2
Operand 3
INCW
RR1
A0
RR1
—
—
INCW
@R1
A1
R1
—
—
