ZiLOG eZ8, User Manual

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UM012811-0904 eZ8 CPU Instruction Set Summary
eZ8 CPU
User Manual
50
SBC dst, src dst
←
dst – src - C r r 32 * * * * 1 * 2 3
r Ir 33 2 4
R R 34 3 3
R IR 35 3 4
R IM 36 3 3
IR IM 37 3 4
SBCX dst, src dst
←
dst – src - C ER ER 38 * * * * 1 * 4 3
ER IM 39 4 3
SCF C
←
1 DF 1 - - - - - 1 2
SRA dst R D0 * * * 0 - - 2 2
IR D1 2 3
SRL dst R 1F C0 * * 0 * - - 3 2
IR 1F C1 3 3
SRP src RP
←
src IM 01 - - - - - - 2 2
STOP Stop Mode 6F - - - - - - 1 2
SUB dst, src dst
←
dst – src r r 22 * * * * 1 * 2 3
r Ir 23 2 4
R R 24 3 3
R IR 25 3 4
R IM 26 3 3
IR IM 27 3 4
SUBX dst, src dst
←
dst – src ER ER 28 * * * * 1 * 4 3
ER IM 29 4 3
Table 20. eZ8 CPU Instruction Summary (Continued)
Assembly
Mnemonic Symbolic Operation
Address Mode
Opcode(s)
(Hex)
Flags
Fetch
Cycles
Instr.
Cycles dst src C Z S V D H
Flags Notation: * = Value is a function of the result of the operation.
- = Unaffected
X = Undefined
C = Carry Flag
0 = Reset to 0
1 = Set to 1
D7 D6 D5 D4 D3 D2 D1 D0
dst
C
D7 D6 D5 D4 D3 D2 D1 D0
dst
C 0