UM012811-0904
eZ8 CPU Instruction Set Description
eZ8 CPU
User Manual
197
XORX
Logical Exclusive OR using Extended Addressing
XORX dst, src
Operation
dst
←
dst XOR src
Description
The source operand is logically EXCLUSIVE OR’ed with the destination operand. An
XORX operation stores a 1 in the destination operand when the corresponding bits in the
two operands are different; otherwise it stores a 0. The contents of the source operand are
unaffected.
Flags
Attributes
Escaped Mode Addressing
Using Escaped Mode Addressing, address mode ER for the source or destination specifies
a Working Register with 4-bit addressing.
If the high byte of the source or destination address is
EEH
(11101110B), a Working Regis-
ter is inferred. For example, the operand
EE3H
selects Working Register R3. The full 12-
bit address is given by {RP[3:0], RP[7:4], 3H}.
To access Registers on Page EH (addresses
E00H
to
EFFH
), set the Page Pointer, RP[3:0],
to
EH
and set the Working Group Pointer, RP[7:4], to the desired Working Group.
C
Unaffected.
Z
Set if the result is zero; reset otherwise.
S
Set if Bit 7 of the result is set; reset otherwise.
V
Reset to 0.
D
Unaffected.
H
Unaffected.
Mnemonic Destination, Source
Opcode (Hex)
Operand 1
Operand 2
Operand 3
XORX
ER1, ER2
B8
ER2[11:4]
{ER2[3:0], ER1[11:8]} ER1[7:0]
XORX
ER1, IM
B9
IM
{0H, ER1[11:8]}
ER1[7:0]
