UM012811-0904
Address
Space
eZ8 CPU
User Manual
17
Figure 5. 16-Bit Register Pair Addressing
Bit Addressing
Many eZ8 CPU instructions allow access to individual bits within registers. Figure 6 illus-
trates how the instruction AND R15, MASK can clear an individual bit.
Figure 6. Bit Addressing Example
Register File Precautions
Some control registers within the Register File provide Read-Only or Write-Only access.
When accessing these Read-Only or Write-Only registers, insure that the instructions do
not attempt to read from a Write-Only register or, conversely, write to a Read-Only regis-
ter. To determine which control registers allow either Read-Only or Write-Only access,
refer to the device-specific Product Specification.
PROGRAM MEMORY
The eZ8 CPU can access 64KB (65,536 bytes) of Program Memory. The Program Mem-
ory provides storage for both executable program code and data. For each product within
the eZ8 CPU family, a block of Program Memory beginning at address
0000H
is reserved
for option bits, the Reset vector, the Watch-Dog Timer time-out vector, the Illegal Instruc-
tion Trap vector, and the Interrupt vectors. The rest of the Program Memory stores code
MSB
LSB
Rn Rn+1
n = Even Address
0
1
1
1
0
0
0
0
R15
1
1
0
1
1
1
1
1
MASK = DFH
0
1
0
1
0
0
0
0
R15
Bit
0
Bit
7
AND R15, DFH
; Clear Bit 5 of Working Register 15