Xilinx ChipScope Pro, User Manual

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ChipScope Pro Software and Cores User Guide www.xilinx.com 7
UG029 (v14.3) October 16, 2012
ChipScope Pro Tools Description
ChipScope Pro Analyzer tool supports the following download cables for communication
between your computer and the devices in the JTAG boundary scan chain:
•
Platform Cable USB
•
Parallel Cable IV
•
Digilent USB-to-JTAG cables
•
ByteTools Catapult EJ-1 Ethernet-to-JTAG cable
The ChipScope Pro Analyzer tool and cores contain many features that you can use to
verify your logic (
Table 1-2 ). User-selectable data channels range from 1 to 4,096 and the
sample buffer sizes range from 256 to 131,072 samples. You can change the triggers in real
time without affecting your logic. ChipScope Pro Analyzer tool leads you through the
process of modifying triggers and analyzing the captured data.
Table 1-2: ChipScope Pro Logic Debug Features and Benefits
Feature Benefit
1 to 4,096 user-selectable data channels
Accurately captures wide data bus
functionality.
User-selectable sample buffers ranging in
size from 256 to
131,072 samples
Large sample size increases accuracy and
probability of capturing infrequent events.
Up to 16 separate trigger ports, each with a
user-selectable width of 1 to 256 channels (for
a total of up to 4096 trigger channels) Multiple separate trigger ports increase the
flexibility of event detection and reduce the
need for sample storage.
Up to 16 separate match units per trigger
port (up to 16 total match units) for a total of
16 different comparisons per trigger
condition
Multiple match units per trigger ports
increase the flexibility of event detection
while conserving valuable resources.
All data and trigger operations are
synchronous to your clock at rates up to 500
MHz
Capable of high-speed trigger event
detection and data capture.
Trigger conditions implement either a
boolean equation or a trigger sequence of up
to 16 match functions Can combine up to 16 trigger port match
functions using a boolean equation or a
16-level trigger sequencer.
Data storage qualification condition
implements a boolean equation of up to 16
match functions
Can combine up to 16 trigger port match
functions using a boolean equation to
determine which data samples are captured
and stored in on-chip memory.
Trigger and storage qualification conditions
are in-system changeable without affecting
the user logic
No need to single step or stop a design for
logic analysis.
Easy-to-use graphical interface
Guides you through selecting the correct
options.