ChipScope Pro Software and Cores User Guide
39
UG029 (v14.3) October 16, 2012
ChipScope Pro Core Inserter Features
Inserting and Removing Units
You can insert new units into the project by selecting
Edit > New ILA Unit
or
Edit > New
ATC2 Unit
. You can remove a unit by selecting
Edit > Remove Unit
after choosing which
unit to delete.
Setting Preferences
You can set the ChipScope Pro Core Inserter project preferences by selecting
Edit >
Preferences
. They are organized into three categories:
Tools, ISE Integration, and
Miscellaneous
“Managing Project Preferences,” page 49
for more information
about setting these preferences.
Inserting the Cores
ICON, ILA, and ATC2 cores are inserted when the flow is completed, or by selecting
Insert
> Insert Core
. If all channels of all the capture cores are not connected to valid signals, an
error message results.
Exiting the ChipScope Pro Core Inserter
To exit the ChipScope Pro Core Inserter, select
File > Exit
.
Specifying Input and Output Files
The ChipScope Pro Core Inserter works in a step-by-step process.
1.
Specify the Input Design Netlist.
2.
Click
Browse
to navigate to the directory where the netlist resides.
3.
Modify the Output Design Netlist and Output Directory fields as needed. (These fields
are automatically filled in initially.)
Note:
When the ChipScope Pro Core Inserter is invoked from the Project Navigator tool, the Input
Design Netlist, Output Design Netlist, Output Directory and Device Family fields are automatically
filled in. In this case, these fields can only be changed by the Project Navigator tool and cannot be
modified directly in the ChipScope Pro Core Inserter.
Project Level Parameters
Three project level parameters (device family, SRL usage, and RPM usage) must be
specified for each project.
Selecting the Target Device Family
The target FPGA device family is displayed in the Device Family field. The structure of the
ICON and capture cores are optimized for the selected device family. Use the pull-down
selection to change the device family to the desired architecture.
The default target device family is Virtex-6.
Using SRLs
The
Use SRLs
checkbox determines whether or not the cores are generated using SRL16
and/or SRL32 components. If the checkbox is
not
selected, the SRL16 components are
replaced with flip-flops and multiplexers, which affects the size and performance of the
generated cores.
