Xilinx ChipScope Pro, User Manual

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ChipScope Pro Software and Cores User Guide www.xilinx.com 17
UG029 (v14.3) October 16, 2012
ChipScope Pro Cores Description
ATC2 Core
The Agilent Trace Core 2 (ATC2) is a customizable debug capture core that is specially
designed to work with the latest generation Agilent logic analyzers. The ATC2 core
provides external Agilent logic analyzers access to internal FPGA design nets (as shown in
Figure 1-4 ).
ATC2 Core Data Path Description
The data path of the ATC2 core consists of:
•
Up to 64 run-time selectable input signal banks that connect to your FPGA design
•
Up to 64 output data pins that connect to the probe connectors of the Agilent logic
analyzer
•
Optional 2x time-division multiplexing (TDM) available on each output data pin that
can be used to double the width of each individual signal bank from 64 to 128 bits
•
Supports both asynchronous timing and synchronous state capture modes
•
Supports any valid I/O standard, drive strength, and output slew rate on each output
data pin on an individual pin-by-pin basis
•
Supports any Agilent probe connection technology [See Reference 25, p. 226]
The maximum number of data probe points available at runtime is calculated as:
(64 data ports) * (64 bits per data port) * (2x TDM) = 8,192 probe points.
ATC2 Core Data Capture and Run-Time Control
The external Agilent logic analyzer is used to trigger on and capture the data that passes
through the ATC2 core. This allows you to take full advantage of the complex triggering,
deep trace memory, and system-level data correlation features of the Agilent logic analyzer
as well as the increased visibility of internal design nodes provided by the ATC2 core. The
Agilent logic analyzer is also used to control the run-time selection of the active data port
by communicating with the ATC2 core via a JTAG port connection (as shown in
Figure 1-4 ).
X-Ref Target - Figure 1-4
Figure 1-4: ATC2 Core and System Block Diagram
1 to
3
2 B
a
nk
s
1x or 2x
TDM
Pro
b
e
Connector
ICON Core
ATC2 Core
FPGA
PCB
U s er
De s ign
256
256
256 64
256
JTAG C ab le
JTAG
Agilent Logic An a lyzer
LPT or U S B
Pro b e s
UG029_ a tc2_ b lock_di a gr a m_021610