Tundra TSI308, User Manual

Page: 172 / 260

4. Register Descriptions 172
Tsi308 User Manual
80D4000_MA001_02
Tundra Semiconductor Corporation
www.tundra.com
4.3.5.84 StoreForward Registe
Register Offset : D1h
4.3.5.85 SMAF field
These register is valid only in GSP/GDP modes. They are reserved in all other modes.
Register Offset : D2h
Bit
R/W
Access
Initial
Value
Field Name and Description
7:5 R 0h Reserved
4 R/W 0h Initiate OIR: This bit allows Tsi308 to trigger OIR sequence through software.
0 = Disable
1 = Enable
3:2 R/W Values
from straps
PCI Frequency: These bits determine the new pci frequency range. PCI PLL takes
values from these bits during warm reset or secondary bus reset through s/w.
Initialization patterns are driven using these bits after warm reset or secondary bus
reset in PCIX mode. These registers can be programmed regardless of the status
of secondary bus reset. Programmed values will take effect only when the
secondary bus is in reset via s/w.
00 – 25 MHz to 50 MHz
01 – 50 MHz to 66 MHz
10 – 66 MHz to 100 MHz
11 – 100 MHz to 133 MHz
1 R/W 1h Store and Issue:
mechanism for posted, non-posted and response packets. This will ensure the
whole data is buffered and available for issuing on pci bus. This will be helpful
mainly in HT2PCI path when PCI bandwidth is higher than HT Link bandwidth.
0 R/W 0h Store and forward:
mechanism for posted, non-posted and response packets. This will ensure the
whole data is buffered and available for forwarding.
Bit
R/W
Access
Initial
Value
Field Name and Description
7:0 R/W 0h SMAF field: Corresponds to SMAF values that are from host.