Toshiba ESTUDIO170F, Service Manual

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January 2005 © TOSHIBA TEC e-STUDIO170F Circuit Description
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The memory capacity of SDRAM (IC1) is allotted as shown in the table below.
The contents of the memory can be completely cleared in the TEST MODE.
Total Memory
SYS area PIX area
Image
memory
Work memory ECM buffer
Transmit/
receive data
buffer
Page memory
Scan/
CODEC/
PC buffer
16,384 KB 7,190.5 KB 849.5 KB 128 KB 24 KB 7,932 KB 260 KB
Signal Name Type Active Description Destination
CPD0-15 I/O - CPU data bus Main-CPU
CPA1-23 I - CPU address bus Main-CPU
RD0-7, ALD0-7 I/O - CODEC work data bus CODEC
RA0-14 I - CODEC work address bus CODEC
PMID0-7 I - CODEC input data bus ASIC
PMOD0-7 O - CODEC output data bus ASIC
SDD0-15 I/O - SDRAM data bus ASIC
SDA0-11 I - SDRAM address bus ASIC