Sony BVP-9500WS, Maintenance Manual

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1-2 (E)
BVP-9500WS/9500WSP MM
x
3 speed signals
The
x
3 speed signals above are input to the memory and then output from the memory as follows.
x
1 speed signal after conversion
Line 1 output
Line 2 output
Line 3 output
1 2 3 6 5 4
field field field field field field
1 field 4 field
2 field 5 field
3 field 6 field
(2) Power supply block
The UNREG power input from the camera adaptor is supplied to the PS-553/554 boards via the CN-1787
board. The PS-553 board generates
+
5.5V,
+
2.5V (Line 1 digital power supply),
+
3.3V,
_
5.5V, FAN A/
B, and + 9.3V power. The PS-554 board generates + 2.5V (Line 2/3 digital power), _ 3.5V, + 6.6V,
+ 15.5V, and _ 11.5V power.
The power for tally drive is generated at the MB-830 board by the control signal from the AT-128 board
and is supplied to the viewfinder. The UNREG power for the lens and viewfinder is the UNREG power
from the camera adaptor.
(3) Video signal processing block
VA-200 board
The video signals sent from the CCD drive block are subject to the following signal processing in this block.
. Gain control
.
White shading correction
. Flare correction
. Pre-knee correction
After this signal processing, the video signals are sent to the AD-157 board.
AD-157 board
The video signals sent from the VA-200 board are passed through the corresponding filters at x 1 speed
and x 3 speed, and converted to digital signals by the 12-bit AD converter. The 12-bit digital signal is then
output to the MEM-98 board.
H synchronization with the CCD drive block is performed by sending the VCO control DC to the CCD
drive block. The VCO control DC is generated by PLL-processing the G channel signal of the AD input
and the H signal input from the MEM-98 board.
MEM-98 board
The RGB 12-bit digital signals sent from the AD-157 board are processed as follows at x 1 speed and x 3
speed, and output to the DA-143 board. The signals input to the DA-143 board are output to the PR-248/
249 boards without being processed.
x x x x x 1 speed processing:
Signals input to the MEM-98 board are output as the Line 1 signal from the MEM-98 board. No
signals are output from Line 2 and Line 3 at this time.
x x
x x
x
3 speed processing:
Signals input to the MEM-98 board are converted from x 3 speed to x 1 speed in the MEM-98 board.
x 3 speed digital signals are input to the memory circuit by field, while the signals output from the
memory are output as
x
1 speed signals by field.
x
3 speed signals are processed by the memory
circuit as follows.
1-1. Circuit Description