Sharp UP-5300, Service Manual

Page: 70 / 123

13. System switch
13-1. DIP Switch
The PSC2 simply reads switched signals from the DIP switch as
hardware. The meaning of DIP switch wholly depends on the
software.
DSW-8
Function
OFF
(value=1)
ON (value=0)
Serial 3 & 4
decode mode
COM3 &
COM4
COM5 &
COM6
DSW-7
Function
OFF
(value=1)
ON (value=0)
COM3 &
COM4 IRQ
assign
(Serial 3 & 4)
COM3 =
IRQ11
COM4 =
IRQ10
COM3 =
IRQ4
COM4 =
IRQ3
DSW-6
Function
OFF
(value=1)
ON (value=0)
CMOS
Initialize
Not Initialize Initialize
DSW-5
DSW-4
Drive C:, D: & E: Setting
Drive
C:
Drive
D:
Drive
E:
DSW-4 DSW-5
HDD — —
ON
(value=0)
ON
(value=0)
HDD
PS
RAM
Flash
ROM ON
(value=0)
OFF
(value=1)
PS
RAM
Flash
ROM
HDD
OFF
(value=1)
ON
(value=0)
Flash
ROM PS
RAM
HDD
OFF
(value=1)
OFF
(value=1)
DSW-3
Function
OFF
(value=1)
ON (value=0)
Boot Drive Drive A: Drive C:
DSW-2
Function
OFF
(value=1)
ON (value=0)
Drive A:
Device
Mask ROM FDD
DSW-1
Function
OFF
(value=1)
ON (value=0)
Floppy Disk
Controller
Not Exit Exit
14. System Memory
14-1. Standard Memory
1,048,576 words
×
16 bits DRAM
3.3V single power source (
±
0.3V)
Access time: 60ns (Maximum)
EDO page mode
Refresh: 4096 cycles/64ms (15.62us)
CBR (CAS before RAS refresh)
Row
×
Column: 12
×
8 (asymmetric)
Bank 0
14-2. Option Memory
144-pin small outline DIMM
Size: 8/16/32/MB
3.3V single power source (
±
0.3V)
Access time: 60ns (Maximum)
EDO page mode
Refresh: 15us
CBR (CAS before RAS refresh)
Bank 1
15. BIOS ROM
15-1. Outline
Sharp’s LH28F004SUT-NC80
Composed of erase blocks divided into 16KB even blocks
5V single power source (write, erase, and read)
512K words
×
8 bits
40-pin TSOP (TYPE1) 4M bits flash ROM
BIOS ROM area: C0000h to FFFFFh
Bank switch between BIOS area and installer area
15-2. Bank Switch
Banks are switched by issuing address signal BA18 from the PSC2.
16. DOS ROM
16-1. Outline
Sharp’s LH535VC
2M words
×
16 bits
Access time: 120ns (Maximum)
5V single power source
48-pin TSOP 16M bits mask ROM
Relocatable bank base address: C0000h, C8000h, D0000h,
D8000h, E0000h, and E8000h
Bank switch of 16KB blocks: Bank 0 to 255
16-2. Bank Base Address
Address signals are inputted from the ISA bus to determine the ROM
disk area to be accessed.
This ROM disk area is base a (0000h-3FFFh) with the size of
16KB.
16-3. Bank Switch
For ROM bank 0 to 255, chip select and bank switch are performed
by issuing address signal BA0-7 and chip select signal MR0# from
the PSC2.
17. Flash ROM Disk
17-1. Outline
Sharp’s LH28F016SUT-10
Composed of erase blocks divided into 64KB even blocks
5V single power source (write, erase, and read)
1M words
×
16 bits
56-pin TSOP 16M bits flash ROM
Relocatable bank base address: C0000h, C8000h, D0000h,
D8000h, E0000h, and E8000h
Bank switch of 16KB block: Bank 512 to 895
ON
OFF
ON
1 2 3 4 5 6 7 8
: Default setting
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