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Type Descriptions:
I
Input TTL compatible
IS
Input with Schmitt Trigger
I/O20
Input/Output with 16 mA sink
@
0.4 V, source 16 mA
@
2.4 V
I/O24
Input/Output with 24 mA sink
@
0.4 V, source 12mA
@
2.4 V
I/O36
Input/Output with 36 mA sink
@
0.4 V, source 8 mA
@
2.4 V
ICLK
CLK input at 24 MHz
OCLK
CLK output at 24 MHz
O4
Output with 4 mA
@
0.4 V, source 4 mA
@
2.4 V
O16
Output with 16 mA sink
@
0.4 V, source 8 mA
@
2.4 V
O20
Output with 16 mA sink
@
0.4 V, source 16 mA
@
2.4 V
O24
Output with 24 mA sink
@
0.4 V, source 12 mA
@
2.4 V
O36
Output with 36 mA sink
@
0.4 V, source 8 mA
@
2.4 V
OD24
Open drain outputs, sinks 24 mA
@
0.4 V
OD36
Open drain outputs, sinks 36 mA
@
0.4 V
11-4. Functional block diagram
CLK1
CLK2
Clock Gen
SERIAL
CLOCK
Host
CPU
Interface
IORJ
IOWJ
AEN
A0-A9
A0-A7
FDRQ
DACKJ
PINTR3
TC
UR2IRQB
UR2IRQA
UR1IRQB
UR1IRQA
PINTR1
PINTR2
FINTR
RESET
DFRQA
DRQB
DACKA
DACKB
A10
IOCHRDY
PWRGD
Power
Management
DATA BUS
ADDRESS BUS
Configuration
Registers
765A
Compatible
Floppy Disk
Controller
Core
Data
Separator
with Write
Precompensa
tion
WDATA
WCLOCK
RCLOCK
RDATA
WDATAJ,RDATAJ
DS0,1J
MTR0,1J
INDEXJ
TRK0J
DSKCHGJ
WRPRTJ
WGATEJ
DENSEL
DIRJ
STEPJ
DRATE0
DRATE1
HDSELJ
16C550
Compatible
Senal Port 2
with
Infrared
TXD2,CTS2J,
RTS2J,IRTX2
RXD2,IRRX2
DSR2J,DCD2J,
RI2J,DTR2J
16C550
Compatible
Senal Port 1
with
Infrared
TXD1(IRTX),CTS1J,
RTS1J
RXD1(IRRX)
DSR1J,DCD1J,
RI1J,DTR1J
STROBEJ,SLCTINJ,
INITJ,AUTOFDJ
Multi-Mode
Parallel
Port/FDC
MUX
BUSY,SLCT,PE,
ERRORJ,ACKJ
PD0-7
CONTROL BUS
5 – 31
Summary of Contents for UP-5300
Page 103: ... B S i d e 9 2 ...
Page 105: ... B S i d e 9 4 ...
Page 106: ...3 V G A P W B A S i d e B S i d e 9 5 ...
Page 107: ...4 R i s e r P W B A S i d e B S i d e 5 T P S w i t c h P W B S w i t c h P W B 9 6 ...
Page 108: ...6 I N V E R T E R P W B A S i d e B S i d e 7 L C D R E L A Y P W B A S i d e B S i d e 9 7 ...