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Signal Name
Pin No.
Signal Type
(Drive)
Selected By
Signal Description
ISA DMA Arbiter Interface
DRQA/DRQ0
M24
I
PCIDV1
99h = 00h
Programmable DMA Request A/DRQ0: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ0, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C0h[2:0].
DRQB/DRQ1
M25
I
PCIDV1
9Ah = 00h
Programmable DMA Request B/DRQ1: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ1, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C0h[6:4].
DRQC/DRQ2
M26
I
PCIDV1
9Bh = 00h
Programmable DMA Request C/DRQ2: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ0, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C1h[2:0].
DRQD/DRQ3
L23
I
PCIDV
9Ch = 00h
Programmable DMA Request D/DRQ3: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ3, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C1h[6:4].
DRQE/DRQ5
L24
I
PCIDV1
9Dh = 00h
Programmable DMA Request E/DRQ5: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ5, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C2h[6:4].
DRQF/DRQ6
M25
I
PCIDV1
9Eh = 00h
Programmable DMA Request F/DRQ6: The DRQ is used to request
DMA service from the DMA controller.
This input defaults to DRQ6, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C3h[2:0].
DRQG/DRQ7
L26
I
PCIDV1
9Fh = 00h
Programmable DMA Request G/DRQ6: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ7, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C3h[6:4].
DACKA#/DACK0#
K22
O
Programmable DMA Acknowledge A/DACK0#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK0#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C0h[2:0].
PPWR4
PCIDV1
C0h[2:0] = 100
Peripheral power control Line 4: Peripheral power control lines 0
through 15 are latch outputs used to control external devices.
DACKB#/DACK1#
K23
O
Programmable DMA Acknowledge B/DACK1#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK1#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C0h[6:4].
DACKC#/DACK2#
K24
O
Programmable DMA Acknowledge C/DACK2#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK2#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C1h[2:0].
DACKD#/DACK3#
K25
O
Programmable DMA Acknowledge D/DACK3#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK3#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C1h[6:4].
DACKE#/DACK5#
K26
O
Programmable DMA Acknowledge E/DACK5#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK5#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C2h[6:4].
DACKE#/DACK6#
J22
O
Programmable DMA Acknowledge F/DACK6#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK6#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C3h[2:0].
DACKG#/DACK7#
J23
O
Programmable DMA Acknowledge G/DACK7#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK7#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C3h[6:4].
Compact ISA Interface
PIO15
AC25
I/O
(4mA)
PCIDV1
8Fh
≠
00h
Programmable Input/Output 15: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
SD[15:0]
Refer to
Table 3-2
I/O
(8nA)
Cycle
Multiplexed
System Data Bus: SD[15:0] provides the 16-bit data path for devices
residing on the ISA bus.
MAD[15:0]
Multiplexed Address/Data Bus: Used during CISA cycles.
5 – 18
Summary of Contents for UP-5300
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Page 105: ... B S i d e 9 4 ...
Page 106: ...3 V G A P W B A S i d e B S i d e 9 5 ...
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