Sharp UP-5300, Service Manual

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11-3. Pin description
A low represents a logic 0 (0V nominal) and a high represents a logic 1 (+2.4V nominal).
Name Number Type Description
HOST Processor Interface
D0-D7 48-51, 53-56 I/O24 Data bus. This connection is used by the host microprocessor to transmit data to and from the M5113.
These pins are in a high impedance state when not in the output mode.
IORJ 44 I I/O Read. This active low signal is issued by the host microprocessor to indicate a read operation.
IOWJ 45 I I/O Write. This active low signal is issued by the host microprocessor to indicate a write operation.
AEN 46 I Address Enable. This active high signal indicates DMA operations on the host data bus.
A0-A9 27, 29-34,
41-43 I I/O Address. These bits determine the I/O address to be accessed during IORJ and IOWJ cycles.
DACKA/
PADCF
28 I DMA Acknowledge. An active low input signal acknowledging the request for a DMA transfer of data
between the host and the printer port. This input enables the DMA read or write internally.
This active high signal is read and latched during reset active.
FDRQ 52 O24 FDC DMA request. This active high output is the DMA request for byte transfers of data to the host.
This signal is cleared on the last byte of the data transfer by the DACKJ signal going low (or by IORJ
going low if DACKJ was already low as in demand mode).
DACKJ 36 I DMA acknowledge. This active low input acknowledging the request for a DMA transfer of data. This
input enables the DMA read or write internally.
TC 35 I Terminal Count. This signal indicates to the M5113 that data transfer is complete. TC is only accepted
when DACKJ or PDACKJ is low. In AT, TC is active high and in PS/2 mode, TC is active low.
UR1IRQA 38 O24 Primary Serial Port Interrupt. UR1IRQA is a source of PSP interrupt. Externally, it should be
connected to IRQ4 on PC/AT.
UR2IRQA 37 O24 Secondary Serial Port Interrupt. UR2IRQA is a source of SSP interrupt. Externally, it should be
connected to IRQ3 on PC/AT.
FINTR 40 O24 FDC Interrupt Request. This interrupt from the Floppy Disk Controller is enabled/disabled via bit 3 of
the Digital Output Register (DOR).
PINTR1 39 O24 Parallel Port Interrupt Request. This request from the Parallel Port is enabled/disabled via bit 4 of the
Parallel Port Control Register. If EPP or ECP mode is enabled, this output is pulsed low, then released
to allow sharing of interrupts.
RESET 57 IS Reset. This active high signal resets the M5113 and must be valid for 500 ns minimum. In M5113, the
falling edge of reset latches the jumper configuration. The jumper select lines must be valid 50 ns prior
this edge.
Floppy Disk Interface
RDATAJ 16 IS Read Disk Data. The active-low, raw data read from the disk is connected here. Each falling edge
represents a flux transition of the encoded data.
WGATEJ 10 O36 Write Gate. This active-low, high-drive output enables the write circuity of the selected disk drive. This
signal prevents glitches during power-up and power-down. This signal prevents writing to the disk when
power is cycled.
WDATAJ 9 O36 Write Data. This active low output is a write-precompensated serial data to be written onto the selected
disk drive. Each falling edge causes a flux change on the media.
HDSELJ 11 O36 Head Select. This active low output determines which disk drive head is active. Low = Head 0, high
(open) = Head 1.
DIRJ 7 O36 Direction. This active low output determines the direction of the head movement (low = step-in, high =
step-out). During the write of read modes, this output is high.
STEPJ 8 O36 Step. This active low output produces a pulse at a software-programmable rate to move the head
during a seek operation.
DSKCHGJ 17 IS Disk Change. This disk interface input indicates when the disk drive door has been opened. This
active-low signal is read from bit D7 of address xx7h.
DS0J,
DS1J 4, 3 O36 Drive Select 0,1. Active low, output signal selects drives 0-1.
IRQIN/
PDIR
99 I
O4
This pin is a multi-function pin. This pin can be used as IRQIN to steer an interrupt signal from external
device onto either UR1IRQB (Pin 18) or UR21RQB (Pin 22).
This pin is PDIR when used to indicate the direction of the Parallel port data bus. 0 = output/write, 1 =
input/read.
A10 97 I This pin is the A10 address input.
MTR0J,
MTR1J 2, 5 O36 Motor on 0, 1. These active-low output select motor drives 0-1.
DACKB 96 I This signal is the Parallel port DMA acknowledge input.
DRQB 98 O24 In ECP mode, this is the Parallel Port DMA Request output active high signal.
DENSEL 1 O36 Density select. This signal indicates whether a low (250/300 kbps) or high (500 kbps) data rate has
been selected. This is determined by the DENSEL bits in Configuration register 5.
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