Sharp UP-5300 Service Manual Download

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6-2. IRQ Block Chart

6-3 IRQ Switch

Riser board (parts side)

S1 = IRQ10:

S(1) = ON (Connect IRQ10 to the ISA Slot.)

M(3) = OFF (Connect IRQ10 to GND, not to the ISA

Slot.)

S2 = IRQ11:

S(1) = ON (Connect IRQ11 to the ISA Slot.)

M(3) = OFF (Connect IRQ11 to GND, not to the

ISASlot.)

+5V

10K

2.7K

+5V

10K

FireStar

IRQ9

+5V

10K

2.7K

+5V

10K

+5V

IRQ10
IRQ11

SICF(IRQ9)

IRQ3
IRQ4

IRQ5

+5V

10K

+5V

10K

+5V

10K

+5V

10K

+5V

10K

Pentium

IRQ15

IRQ3
IRQ4

IRQ10
IRQ11

IRQ5

IRQ6
IRQ7

IRQ12

IRQ8#

IRQ14

PSC2

IRQ9

IRQ15

PIRQ9

PIRQ15

Mask n

IRQn

PIRQ3
PIRQ4

IRQ3
IRQ4

PIRQ10
PIRQ11

IRQ10
IRQ11

IRQ3
IRQ4

IRQ15

IRQ9

ISA Slot

IRQ5

Super I/O

IRQ6
IRQ7

IRQ5

KBC

KIRQ12

IRQ1

RTC

IRQ8#

IDE CON

DIRQ

=Not used

IRQ6
IRQ7

IRQ12

IRQ14

IRQ1

IRQ11

IRQ10

(3)

(1)

(3)

(1)

7. CPU

7-1. Introduction

Intel’s Pentium Processor (A80502CSLM66133SY028) is used.

Pentium Processor Bus Frequency Selection

Core Frequency

(max)

External Bus

Frequency (max)

Bus/Core

Ratio

BF1

(Y33)

BF0

(Y35)

Selection

100MHz

66MHz

2/3

UP-5300 Setting

Setting 1 = 10kohm Pull up (Vcc3)

0 = 0ohm Grounding

MicroClock MK1492-04R Power-up Input Setting

Pin #

Name

Internal Resistor

Setting

Function

Mid-level

Default

All Clock Outputs Enabled

CPUS#

Pull up

Default

PCISTP#

Pull up

Default

HOST = 66.66MHz

Pull up

Default

CSSS

Pull up

Default

Power Down Mode = All Clocks On

Pull up

Default

HOST7,8 Tristated

SEL0

Pull up

Default

48M/14.3M = 48.0MHz

Pull up

Pull down

EMI Control ON

SEL1

Mid-level

Default

F1 = 14.318MHz

PEN

Mid-level

Default

Pin25 = PCI, Pin24=PCIF

The external pull down resistor is 10kohm.

5 – 6

Summary of Contents for UP-5300

Page 1: ...TILITY 6 1 CHAPTER 7 ABOUT UTILITY SOFTWARE AND OTHERS 7 1 CHAPTER 8 CIRCUIT DIAGRAM 8 1 CHAPTER 9 PWB LAYOUT 9 1 PARTS GUIDE CONTENTS SHARP CORPORATION Parts marked with is important for maintaining the safety of the set Be sure to replace these parts with specified ones for maintaining the safety and performance of the set This document has been published to be used for after sales service only ...

Page 2: ...BATTERY DISPOSAL Contains Nickel Metal Hydride Battery Must be Disposed of Properly Contact Local Environmental Officials for Disposal Instructions ...

Page 3: ...type Max 40 Mbytes adding S O DIMM Video RAM 1 Mbytes EDO type BIOS ROM 512 Kbytes Flash ROM OS MS DOS ROM 4 Mbytes Mask ROM ROM disk memory for stored Application software Standard 2 Mbytes Flash ROM Max 6 Mbytes adding UP F04RB RAM disk memory for POS data Standard 1 Mbytes PS RAM Max 3 Mbytes adding UP P02MB Keyboard controller M38802M270 Super I O M5113 A2 POS system controller PSC2 LZ9AM22 3 ...

Page 4: ...ning the main power switch OFF and then pressing the shutdown switch Out line The shutdown switch is single shot type Normally OFF position Push ON This position is used to reset stand by mode for power supply unit when software hang up Release OFF Usually the shutdown switch needs to be set to this position when the UP 5300 is operated Operating method The shutdown switch is a push switch If it i...

Page 5: ...When the power switch is set to this position the power supply stops automatically But if the software pro gram controls the power supply to hold even if the power switch is set into this position power is supplied until an software program allows power supply no to hold Operating method The power switch is a see saw switch and it can be tipped toward the ON or OFF 4 Software 4 1 Software Structur...

Page 6: ...on utility program MS DOS F These software are provided with FD from SHARP corporation Please copy contents of FD provided from department to development PC Install to UP 5300 by using APL Install Program from PC 4 3 Memory map 0000000h 0800000h 1000000h 1800000h 2800000h STD 8MB 8MB 16MB 8MB 24MB 32MB 40MB 00000h 9F4000h A0000h C0000h C8000h E8000h 100000h MS DOS 25K Sharp Driver 32K Free Convent...

Page 7: ...er side display Option UP I20DP NEW Built in printer Option UP T80BP Standard4channels Additional 2 channels Host PC Scale supplied on site Coin dispenser supplied on site For North America only Drink dispenser supplied on site For Europe only 2 Options No NAME MODEL NAME DESCRRIPTION 1 Expansion RAM disk board UP P02MB 2 Mbytes RAM board 2 Expansion ROM disk board UP F04RB 4 Mbytes ROM board 3 Cu...

Page 8: ...t is necessary to satisfy the 2 5 inch Hard Disk Drive specification as follows Specification 2 5 inch type Hard Disk Drive MAKER FUJITSU MODEL MHD2021AT PARTS No REVISION No 1 Part No CA01640 B040 Rev No A4 CAPACITY 2 16 Gbytes INTERFACE ATA 3 4 Service options No NAME PARTS CODE PRICE DESCRIPTION 1 Connector cable for Dongle LPT 1 QCNW 7858BHZZ BL Relay line from Terminal to Dongle 2 HDD mountin...

Page 9: ...airing and checking the operation External view Plain view RAM1A LED circuit Not used currently Test pins Used to check the ISA bus signal ISA bus connectors Used to connect with the I F PWB of ER A8RS etc Connected to the UP 5300 ISA bus connectors UP 5300 ISA bus connector ER A8RS ISA checker ISA bus connector Used to check the ER A8RS solder side Connected to the ISA bus connector of ISA checke...

Page 10: ... card UKOG 6718RCZZ Used when executing the diagnostics of the UP E12MR2 External view ER A8RS solder side ISA relay board ER A8RS parts side ISA PWB ISA checker 150 8 Signal name Pin No 1 STROBE 2 DB0 3 DB1 4 DB2 5 DB3 6 DB4 7 DB5 8 DB6 9 DB7 10 ACK 11 BUSY 12 PE 13 SLCT 14 AUTOFD 15 ERROR 16 INIT 17 SLCTIN 18 25 PE Signal name Pin No 1 STROBE 2 DB0 3 DB1 4 DB2 5 DB3 6 DB4 7 DB5 8 DB6 9 DB7 10 AC...

Page 11: ... board CKOG 6727BHZZ is a tool to write a BIOS ROM program in the F ROM on the UP 5300 s main board Use this PWB in the following cases The F ROM on the UP 5300 s main board be comes unreadible and a BIOS ROM program must be written in the F ROM The BIOS ROM program in the F ROM is overwritten due to the version up of BIOS ROM program etc The BIOS loading board is connected to the Option ROM RAM d...

Page 12: ...all the EP ROM master ROM containing a BIOS program on the BIOS loading board CKOG 6727RCZZ Caution The AC power must be removed prior to installing the BIOS loading board 2 Set SW1 on the BIOS loading board to the side of pin 3 BIOS MASTER ROM LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 LED9 SW1 1 3 SW1 1 3 SW1 2 6 ...

Page 13: ... LED1 RED LED2 RED LED3 RED LED4 RED LED5 RED LED6 RED LED7 RED LED8 RED LED9 GREEN FUNCTION E E E E E E E E Start of COPY FUNCTION E Start initializing E Erasing F ROM LED6 RED is blinking E E Start copy programming to F ROM from EP ROM E E Programming Bank0 C0000 h 64KB E E E Programming Bank0 D0000 h 64KB E E E Programming Bank0 E0000 h 64KB E E E E Programming Bank0 F0000 h 64KB E E E Programm...

Page 14: ...ing ERROR in F ROM LED1 RED LED2 RED LED3 RED LED4 RED LED5 RED LED6 RED LED7 RED LED8 RED LED9 GREEN FUNCTION E E E E Device not ready E E E E VPP error E E E E E Command sequence error Verifying ERROR in F ROM LED1 RED LED2 RED LED3 RED LED4 RED LED5 RED LED6 RED LED7 RED LED8 RED LED9 GREEN FUNCTION E E E E Device not ready while release the protection E E E E Can not release the protection 2 8...

Page 15: ...h the touch panel with tools The heat seal section is easily disconnected Be careful not to place stress to the heat seal section when installing The touch panel is provided with an air groove to make the exter nal and the internal air pressure equal to each other If water or oil is put around the air groove it may penetrate inside Be careful to keep the air groove away from water and oil Do not u...

Page 16: ... operation is not compatible for some keyboards Some keyboards may cause operation errors due to delicate timing and conflicts It is currently found that the following models of keyboards may mal function When selecting a keyboard to be connected test the keyboard in advance to check that it correctly works Japanese keyboard 106 keys Manufactured by IBM TYPE MODEL5576 B01 FRUPN66G0507 English keyb...

Page 17: ...15 9 Seek Write Read Verify Test 4 15 10 Target Sector Write Read Verify Test 4 16 11 HDPatch Test Utility 4 16 12 Error Logging Area Clear 4 16 13 Error table display 4 16 14 Other Supplemental Items 4 16 15 Error Content 4 16 16 Error Information Storing Area Description 4 16 3 18 FDD Diagnostics 4 17 3 19 FAN LCD ON OFF Diagnostics 4 17 1 FAN LCD ON OFF Check 4 17 3 20 Power Hold Diagnostics 4 ...

Page 18: ... each word If it is O K test data AAAAH is written to the test area iii Test data and read data are compared by each word If it is O K test data 5555H is written to the test area iv Test data 0000H is written to all the test areas v Test data and read data are compared by each word If it is O K test data FFFFH is written to the test area vi Test data and read data are compared by each word If it i...

Page 19: ...vii Test data and read data are compared by each word If it is O K test data 5555H is written to the test area viii Test data and read data are compared by each word If it is O K test data 0000H is written to all the test areas ix Test data and read data are compared by each word If it is OK test data FFFFH is written to the test area x Test data and read data are compared by each word If it is OK...

Page 20: ...Fh FEFFh The two left digits are the lower address and the two right address are the upper address Read verify check is performed When NO is selected When NO is selected read check is performed for the above increment data Therefore the option FLASH ROM to be tested must be passed by write read verify check once If the proper value is not read the following display is made Press the ESC key to ter...

Page 21: ...rmed The initial display is as follows 1 Controller Diag Test 1 Checking content After initializing the controller the diagnostic command is ex ecuted The procedures are as follows One byte of dummy data FFh is sent and a wait state of 100ms is made The reset command 80h is sent and a wait state for the end code 2 bytes 90h and 00h from the controller is made The diagnostic command 2 bytes 89h any...

Page 22: ...iceman diagnostics menu 1 PARALLEL1 Loop Check 1 Checking content A loop check is made for the standard I O address 378H 37FH PARALLEL1 In the loop check a normally operating ER A8RS is inserted and the loop cable UKOG 6717RCZZ is connected between PARAL LEL1 and PARALLEL3 ER A8RS for testing Set the jumpers on the PWB prior to the test as follows 2 Display The interruption level is displayed at X...

Page 23: ... print check is performed for the standard port PARALLEL1 at I O address 378H 37FH In the print check the D Sub 25 pin connector is connected with a printer to allow a print pattern test The test procedures are as follows i Data of 55H is written to I O address 378H and the same address is read If the read data is not 55H PARALLEL1 Channel Disabled is displayed and the following check is not perfo...

Page 24: ...e ER A8RS to be tested as shown in Fig 3 10 and connect the D Sub 25 pin connector to a printer to allow a print pattern test Fig 3 10 Jumper pin setting The test procedures are as follows i Data of 55H is written to I O address 3BCH and the same address is read If the read data is not 55H PARALLEL3 Channel Disabled is displayed and the following check is not performed ii Characters of 20H 7FH ASC...

Page 25: ...t DSR RI signal is normally operating In case of any error ERROR is displayed When an error occurs in procedure i or ii the following test is not performed iv Set the baud rate to 19200bps asynchronous 256 byte data of 00H FFH is transmitted from SD signal Data received at RD signal is compared to check that the both are the same If the outputted data is not returned for 5 sec or more ERROR is dis...

Page 26: ...l ii Reversed pattern of pattern i iii Vertical stripe pattern in 1 dot interval iv Reversed pattern of pattern iii v Horizontal stripe pattern in 1 dot interval vi Reversed pattern of pattern v vii H pattern 80 digits 35 lines In the 35th line only 78 digits of H are displayed The actual display range is 25 lines Scroll for 10 lines to check viii Gradation pattern from black to white in 16 gradat...

Page 27: ...yed as follows 3 Terminating method Press the Esc key to terminate the test and return to the Serviceman s diagnostics menu 3 14 System Switch Diagnostics The system switch information of the main PWB is displayed Pressing the Esc key returns to the serviceman diagnostics menu 1 System Switch 1 Checking content The system switch reads I O address 7F0H every 10ms to display the value of bit 0 7 The...

Page 28: ...t sector and batch test Other functions Drive status display controller check error log ging area error information display and error information display Test screen service repair only On the above screen select the desired test item with UP and DOWN keys and press the Enter key to execute the test Pressing the Esc key returns to the initial menu READ MODE TEST 1 Drive Status display 1 Checking c...

Page 29: ...When 1 Pass is set a series of tests is made only once and the test is stopped 2 Display Same as the above sequential read however the following con tents are different The test Point is changed at random in the range of 000 XXX cylinder range set value Each point is tested once and the pass count is added by one with XXX times 3 Terminating method Press the Esc key during execution of the test or...

Page 30: ... The methods to interrupt resume and terminate the test are same as 2 Sequential read 6 HD Dump Test Test conditions setting Cylinder No 0 inmost cylinder A certain cylinder No to be displayed is set Head No 0 final head A certain head No to be displayed is set Sector No 1 final sector A certain sector No to be displayed is set 1 Checking content The sector set in the above is displayed on the scr...

Page 31: ...der The read verify check is made in the direction of 0 inmost cylinder The write is made in the direction of inmost cylinder 0 The read verify check is made in the direction of inmost cylinder 0 When writing data write different data from the original stored data Before writing or reading the head is moved to the previous or the following cylinder Head movement When track N is read the head moves...

Page 32: ...of 0 head The areas to be cleared with 00H is the last cylinder and all the sectors of 0 head 2 Display Select Yes at position move with key and press the Enter key to execute the test When the test is executed once the mode enters the key waiting mode After executing the test press the space key to execute again 3 Terminating method Press the Esc key to return to the menu screen 13 Error table di...

Page 33: ...exhaust fan and the LCD are turned ON OFF When this menu is selected the following display is shown When any key is pressed 1 is written to bit 4 of PSC2 general use I O port HIOP At that time the CPU fan and the exhaust fan are stopped and the LCD and the backlight are turned off When any key is pressed under this state or if there is no key input for 10 sec the display automatically returns to t...

Page 34: ... Memory L2 cache None System Memory DRAM Standard 1M 16b EDO Asym 60ns Vcc 3 3V 4chip 8MB Option 144pin S O DIMM socket 1 8MB 16MB 32MB BIOS ROM 512K 8b 512KB Flash ROM Vcc 5 0V DOS ROM 1M 16b 2MB Mask ROM Vcc 5 0V Flash ROM Disk Standard 1M 16b 2MB Vcc 5 0V Option 2M 16b 4MB PS RAM Disk Standard 512K 8b 2chip 1MB Vcc 3 3V Option 512K 8b 4chip 2MB Video RAM 256K 16b 2chip 1MB Vcc 3 3V 1 8 Analog T...

Page 35: ...A MD VGA PCB TCP PCB PCI Bus Ethernet PSC2 ISA Bus Main PCB PS 2 KBC M38802 M270 Serial2 Parallel1 Serial1 COM1 COM2 LPT1 COM4 6 COM3 5 Serial3 Serial4 LCD VGAC MN89305 MCR Drawer Serial7 System SW PS 2 Keyboard 2 5 HDD ER A8RS ISA slot Analog Touch Panel CCFT Inveter Power Supply 5V 12V 12V GND DOS ROM 2MB Buffer Super I O M5113A2 UP H14FD 3 5 FDD Buzzer RAS CAS ctrl SD SA AD Dctrl Dctrl SD SD SA...

Page 36: ...B 1000000 FPM EDO DRAM Option 8Byte SOD 32MB FPM EDO DRAM Option 8Byte SOD 16MB FPM EDO DRAM Option 8Byte SOD 8MB 1800000 27FFFFF M ROM Bank0 255 F ROM Bank512 895 PS RAM Bank0 191 NOTE When the system installer is started the System BIOS ROM uses addresses from C0000h to CAFFFh Use caution not to let addresses contend with each other when using an ISA option boards equipped with BIOS ROM 5 3 ...

Page 37: ...rol 400 40A 40B EISA DMA Extended Mode control 410 4EF 4D6 EISA DMA Extended Mode control 4D7 57F 580 59F POS I O 5A0 7EF 7F0 7F1 PSC Special System Register 7F2 7FF 800 97F 980 99F POS I O 9A0 A78 A79 PnP ISA Auto Configuration Port A7A BFF C00 CF7 CF8 CFF PCI Configuration D00 D7F D80 D9F Reserved POS I O DA0 FFF 4 2 POS specification Address POS I O UP 5300 U A 180 189 Extended Interrupt contro...

Page 38: ...ial7 Serial7 3 4 IRQx Touch Panel IRQ3 COM2 Serial2 Serial2 COM2 COM4 Serial4 Serial4 IRQ4 COM1 Serial1 Serial1 COM1 COM3 Serial3 Serial3 IRQ5 LPT2 ISA ISA LPT2 IRQ6 FDC FDC FDC FDC IRQ7 LPT1 LPT1 LPT1 LPT1 ER A8RS Serial 2ch Parallel 1ch may be used This function is used with 0ohm Resistor etc Extended Interrupt On Board POS Device IRQx0 MCR UP E12MR2 IRQx1 Serial5 Built in Printer UP T80BP IRQx2...

Page 39: ...6 IRQ7 IRQ12 IRQ14 IRQ1 IRQ11 IRQ10 S2 M 3 S 1 M 3 S 1 S1 7 CPU 7 1 Introduction Intel s Pentium Processor A80502CSLM66133SY028 is used Pentium Processor Bus Frequency Selection Core Frequency max External Bus Frequency max Bus Core Ratio BF1 Y33 BF0 Y35 Selection 100MHz 66MHz 2 3 1 1 UP 5300 Setting Setting 1 10kohm Pull up Vcc3 0 0ohm Grounding MicroClock MK1492 04R Power up Input Setting Pin Na...

Page 40: ...CD A27 A21 A24 VSS VCC3 VCC2 AE VSS AD NC NC APCHK A23 INTR NC VSS VCC3 VCC2 AC VSS AB NC HOLD PRDY NMI SMI RS VSS VCC3 VCC2 AA VSS Z NC BOFF WB WT INIT PEN IGNNE VSS VCC3 VCC2 Y VSS X NC BRDY NA BF0 NC BF1 VSS VCC3 VCC2 W VSS V EWBE AHOLD KEN NC STPCLK NC VSS VCC3 VCC2 U VSS T CACHE MI O INV VCC3 VCC3 VSS VSS VCC3 VCC2 S VSS R BP2 PM1BP1 BP3 NC NC NC VSS VCC3 VCC2 Q VSS P PM0BP0 IERR FERR TRST TM...

Page 41: ... external system has accepted the processor data in response to a write request This signal is sampled in the T2 T12 and T2P bus states BREQ O The bus request output indicates to the extemal system that the processor has internally generated a bus request This signal is always driven whether or not the processor is driving its bus BUSCHK I The bus check input allows the system to signal an unsucce...

Page 42: ... up If INIT is sampled high when RESET transitions from high to low the processor will perform built in self test prior to the start of program execution INTR I An active maskable interrupt input indicates that an external interrupt has been generated If the IF bit in the EFLAGS register is set the processor will generate two locked interrupt acknowledge bus cycles and vector to an interrupt handl...

Page 43: ...ssor boundary scan in accordance with the IEEE Boundary Scan interface Standard 1149 1 It is used to clock state information and data into and out of the processor during boundary scan TDI I The test data input is a serial input for the test logic TAP instructions and data are shifted into the processor on the TDI pin on the rising edge of TCK when the TAP controller is in an appropriate state TDO...

Page 44: ...MA10 MA11 MD63 MD62 GNT2 C BE1 C BE0 PLOCK DEV SEL MD61 MD60 MD59 MD58 MD57 VCC _PCI STOP GNT0 REQ2 CLK RUN MD56 MD55 MD54 MD53 VCC _DRAM GNT1 CPAR SERR PERR REQ0 MD52 MD51 MD50 MD49 MD48 REQ1 GNT3 REQ3 IRQ SER IRQ1 MD47 MD46 MD45 MD44 HD43 VCC _CORE IRQ 3 A IRQ 4 B IRQ 5 C IRQ 6 D MD42 MD41 MD40 MD39 VCC _DRAM CMD SEL ATB IRQ 7 E IRQ6 IRQ 9 F MD38 MD37 MD36 MD35 HD34 GND GND GND GND 5VREF IRQ 11 ...

Page 45: ...IGERR low when FERR is low IGERR AC6 I O 4mA Ignore Coprocessor Error Normally high IGERR will go low after FERR goes low and an I O write to Port 0F0h occurs When FERR goes high IGERR is driven high Strap option pin refer to Table 3 7 CPU Control Status CPUINIT AD6 O CPU Initialize a shutdown cycle or a low to high transition of I O Port 092h bit 0 will trigger CPUINIT If keyboard emulation is en...

Page 46: ... a hard reset to the CPU whenever the PWRGD input goes active RSMRST SYSCFG ADh 5 1 Resume Reset Generates a hard reset to the CPU on resuming from Suspend mode Host Power Control SMI AE5 O 4mA System Management Interrupt This signal is used to request System Management Mode SMM operation SMIACT U1 I System Management Interrupt Active The CPU asserts SMIACT in response to the SMI signal to indicat...

Page 47: ...M modules being used this signal may or may not need to be buffered externally This signal however should be connected to the corresponding DRAM RAS line through a damping resistor SDCS0 SDRAM Chip Select Line 0 Each SDCS output corresponds to a unique SDRAM Bank When active the SDRAM will accept the command from FireStar These outputs must be connected to the SDRAM banks through a damping resisto...

Page 48: ...PAR is generated for address and data phases and is only guaranteed to be valid on the PCI clock after the corresponding address or data phase FRAME AB9 I O PCI Cycle Frame FRAME is driven by the current bus master to indicate the beginning and duration of an access FRAME is asserted to indicate that a bus transaction is beginning FRAME is an input when FireStar is the target and an output when it...

Page 49: ...tion pin refer to Table 3 7 PCICLK1 AB17 O 4mA RTCRD strap option PCI Clock Output 1 REQ2 AB16 I PCIDV1 88h 00h PCI Bus Request 2 REQ is used by PCI bus masters to request control of the bus GNT2 AB15 O PCI Default PCI Bus Grant 2 GNT is returned to PCI bus masters asserting REQ when the bus becomes available REQ3 AD18 I PCI Bus Request 3 REQ is used by PCI bus masters to request control of the bu...

Page 50: ...5 AE19 I Programmable Interrupt Request C IRQ5 This input defaults to IRQ5 however it can be programmed to route onto any ISA or PCI interrupt through PCIDV1 B2h IRQC IRQ5 is a 5 0V tolerant input even when its power plane is connected to 3 3 V as long as the 5VREF pins of FireStar are connected to 5 0V IRQD IRQ6 AF19 I Programmable Interrupt Request D IRQ6 This input defaults to IRQ6 however it c...

Page 51: ...ACK is used to acknowledge DRQ to allow DMA transfer This input defaults to DACK0 however it can be programmed to route onto any internal DACK by programming PCIDV1 C0h 2 0 PPWR4 PCIDV1 C0h 2 0 100 Peripheral power control Line 4 Peripheral power control lines 0 through 15 are latch outputs used to control external devices DACKB DACK1 K23 O Programmable DMA Acknowledge B DACK1 DACK is used to ackn...

Page 52: ...put when the FireStar owns the ISA bus MWR is an input when an ISA master other than FireStar owns the ISA bus IOR AB24 I O 8mA I O Read IOR is the command to an ISA I O slave device that the slave may drive data on to the ISA data bus SD 15 0 The I O slave device must hold the data valid until after IOR is negated IOR is an output when FireStar owns the ISA bus ISA is an input when an external IS...

Page 53: ...Primary IDE Channel XD3 Y23 I O 8mA Cycle Multiplexed See Note XD Bus Line 3 ISA status signal IDE_DA1 Address Bit 1 for Primary IDE Channel XD2 Y24 I O 8mA Cycle Multiplexed See Note XD Bus Line 2 ISA status signal IDE_DA0 Address Bit 0 for Primary IDE Channel XD1 Y25 I O 8mA Cycle Multiplexed See Note XD Bus Line 1 ISA status signal IDE_DRD Drive Read Control for Primary IDE Channel XD0 Y26 I O ...

Page 54: ...e Selection Pins Signal Name Pin No Signal Type Drive Selected By Signal Description RSVD B7 I O 4mA Reserved This pin is reserved for possible additional functionality on future revisions of FireStar However it is used as an input for the ATE Test Mode selection address See TMS pin AB5 description Strap option pin for future 2 5V CPU interface refer to Table 3 7 RSVD A7 I O 4mA Reserved in FireSt...

Page 55: ... incorporated XOUT Clock output P00 P07 I O port P0 8 bit I O port I O can be specified in bits using a program When resetting these ports go into input mode CMOS input level is used and the form of output is CMOS 3 state P10 P17 I O port P1 P20 P27 I O port P2 8 bit I O port with the same feature as P0 CMOS input level is used and the form of output is CMOS 3 state The 4 bits of P24 to P27 can ou...

Page 56: ...owing type of LCD panel LM10V33 640 480 XRGB DSTN 256 color The display data format of the MN89305 is 16 bpp In the 16 bpp format Data in memory directly becomes R G and B data and makes it possible to select between the R 5 G 6 B 5 and R 5 G 5 B 5 formulation For the area of less than 6bits 5 bit data is positioned to the 5 higher order bits This data is output passing through the gray scale engi...

Page 57: ... MD18 MD19 MD20 MD21 MD22 MD23 MD24 MD25 MD26 MD27 MD28 MD29 MD30 MD31 VDD VSS BACKON LOGICON LCDON LD0 LD1 LD2 LD3 AD15 AD14 AD13 AD12 AD11 AD10 VSS AD9 AD8 VDD AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VSS VDD SCK DISP FP LP UD7 UD6 UD5 UD4 UD3 UD2 UD1 UD0 LD7 LD6 LD5 LD4 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 144 143 142 141 140 139 138...

Page 58: ...t LOW is output when access to VIDEO BIOS is accepted 10 3 2 Memory access related pins Pin name I O Level Function MA 9 0 I O CMOS Memory Address Address for display memory It becomes input mode when resetting MA 2 0 determines the host type of the chip MA 9 3 is taken into the internal latch as data about the expansion terminal monitor register RAS O RAS Address Strobe This output is the strobe ...

Page 59: ...ode UD 7 0 LD 7 0 O Upper Lower Data 7 0 This is data for outputting display data In the external RAMDAC mode LD 7 0 is display data while UD 7 0 is write data line to the RAMDAC register 10 3 4 Chip settings Pin name I O Level Function RESET RST I 5VTTL RESET ISA RST 386 486 PCI The chip is reset to the initial state when this input is at high This reset signal controls the phase of the clock whe...

Page 60: ...state FDC disable config port 398h 26 IRRX2 FACF 1 25 IRTX2 CFG2 1 Configuration port 398h Internal pull up Setting 1 Pull up Vcc5 0 Pull down 11 2 Pin assignments GRAY SCALE ENGINE HALF FRAME CONTROL LCD I F TFT SSTN DSTN PCI ISA 386 486 HOST I F WRITE FIFO READ FIFO GRAPHICS BitBLT PATBLT STRING EXTEND CRTC LCDC ATT RAM PSCONV VIDEO FIFO MEMORY ACCESS ARBITRATOR MEMORY I F EDO FastPage DRAMs PLL...

Page 61: ... bit 4 of the Parallel Port Control Register If EPP or ECP mode is enabled this output is pulsed low then released to allow sharing of interrupts RESET 57 IS Reset This active high signal resets the M5113 and must be valid for 500 ns minimum In M5113 the falling edge of reset latches the jumper configuration The jumper select lines must be valid 50 ns prior this edge Floppy Disk Interface RDATAJ 1...

Page 62: ... and latched during reset active DTR2J S2CF1 93 O4 I Data Terminal Ready This active low output is for secondary serial port Handshake output signal notifies modem that the UART is ready to establish data communication link This signal can be programmed by writing to bit 0 of Modem Control Register MCR The hardware reset will clear the DTRJ signal to inactive mode high Forced inactive during loop ...

Page 63: ...T 59 I Printer Selected Status This active high output from the printer indicates that it has power on Bit 4 of the Printer Status Register reads the SLCT input ERRORJ 75 I Error This active low signal indicates an error condition at the printer PD0 PD7 71 68 66 63 I O20 Port Data This bi directional parallel data bus is used to transfer information between CPU and peripherals IOCHRDY 100 OD24 IOC...

Page 64: ...mA 0 4 V 11 4 Functional block diagram CLK1 CLK2 Clock Gen SERIAL CLOCK Host CPU Interface IORJ IOWJ AEN A0 A9 A0 A7 FDRQ DACKJ PINTR3 TC UR2IRQB UR2IRQA UR1IRQB UR1IRQA PINTR1 PINTR2 FINTR RESET DFRQA DRQB DACKA DACKB A10 IOCHRDY PWRGD Power Management DATA BUS ADDRESS BUS Configuration Registers 765A Compatible Floppy Disk Controller Core Data Separator with Write Precompensa tion WDATA WCLOCK R...

Page 65: ...to consideration After power off POFF 0 is detected if the power down of DC 5V PWRGOOD 0 is detected or 200ms elapsed PWRGD signal is automatically set to 0 by hardware Applications must be completely shunted before the PSC2 automatically shutdowns When resetting using the software enabling the shutdown enable bit bit 0 of special system register 1 allows hardware reset After enabling this bit the...

Page 66: ...DC and SHEN1 2 signals shift enable signal must be prepared as CKDC interface However SHEN1 2 are used in the PSC2 as dedi cated signal pins inputting interrupt events SCKF is outputted to SCK pin without the logic changed and preset to 1 by RESET The serial data is in the form of LSB first SCKF operates with synchronized with SCK and the operation speed depends on the speed of CPU because the shi...

Page 67: ...3 10 General Purpose I O Port A 6 bit I O port used for general purposes is configured in the PSC 12 3 11 Mode Key Control and Clerk Key Control NotUsed 12 4 Pin assignment 156 155 154 153 152 151 150 148 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 1 2 3 4 5 6 7 8 9 1...

Page 68: ...M4 6 DTR 50 I DSR2 RS 232 COM4 6 DSR Pin No I O Signal name Function 51 O RTS2 RS 232 COM4 6 RTS 52 I CTS2 RS 232 COM4 6 CTS 53 I DCD2 RS 232 COM4 6 DCD 54 I RI2 RS 232 COM4 6 RI 55 GND 56 O TXD1 RS 232 COM3 5 TXD 57 I RXD1 RS 232 COM3 5 RXD 58 O DTR1 RS 232 COM3 5 DTR 59 I DSR1 RS 232 COM3 5 DSR 60 O RTS1 RS 232 COM3 5 RTS 61 I CTS1 RS 232 COM3 5 CTS 62 I DCD1 RS 232 COM3 5 DCD 63 I RI1 RS 232 CO...

Page 69: ... SA22 Pin No I O Signal name Function 155 I SA23 ISA BUS SA23 156 GND 157 O PIRQ3 INTERRUPT REQUEST 3 to CPU 158 O PIRQ4 INTERRUPT REQUEST 4 to CPU 159 O PIRQ9 INTERRUPT REQUEST 8 to CPU 160 O PIRQ10 INTERRUPT REQUEST 10 to CPU 161 O PIRQ11 INTERRUPT REQUEST 11 to CPU 162 O PIRQ15 INTERRUPT REQUEST 15 to CPU 163 O PWRGD POWER GOOD to CPU 164 GND 165 VDD 166 O PRAS0 STD PS RAM WORD CHIP SELECT 0 16...

Page 70: ...ime 60ns Maximum EDO page mode Refresh 15us CBR CAS before RAS refresh Bank 1 15 BIOS ROM 15 1 Outline Sharp s LH28F004SUT NC80 Composed of erase blocks divided into 16KB even blocks 5V single power source write erase and read 512K words 8 bits 40 pin TSOP TYPE1 4M bits flash ROM BIOS ROM area C0000h to FFFFFh Bank switch between BIOS area and installer area 15 2 Bank Switch Banks are switched by ...

Page 71: ...vel TTL level Data format Binary Bit form Start bit 1 data bit 8 stop bit 1 non parity Interface signal RXD TXD Sampling speed 100pps maximum 20 Reset circuit 20 1 Block diagram The RESETDRV in the PSC2 resets the ISA device in the PSC2 The PHOLD is a control signal turning ON OFF of AC input by the software The PHSNS is a sense signal 20 2 Timing Chart A Power cut SSR1 07F1h 1 0 is set B Power of...

Page 72: ...Function I O 1 5V 5V 2 ER Data terminal Ready O 3 SD Send Data O 4 SG Signal Ground 5 SG Signal Ground 6 NC Not Connected 7 DR Data set Ready I 8 5V 5V O Connector for UP I20DP Pin No Signal Function I O 1 SG Signal Ground 2 SG Signal Ground 3 SD Send Data O 4 ER Data terminal Ready O 5 DR Data set Ready I 6 5V 5V 7 5V 5V 21 5 Cautions UP P20DP and UP I20DP can not be used simultaneously with in s...

Page 73: ...ls of RJ45 Connector COM port are equipped COM3 and COM4 or original I O address COM5 and COM6 can be selected as the 2 channels of RJ45 COM port In order to supply 5V power CI signal and 5V power supply of COM1 and COM2 can be switched Main PWB 24 2 Connector Specifications 1 COM1 COM2 D SUB9 Pin No Signal Function I O 1 CD Data Carrier Detect I 2 RD Receive Data I 3 SD Send Data O 4 ER Data Term...

Page 74: ...nd period at same time After 1 long beep menu will be displayed 3 The system will reset automatically after setup is terminated 3 Setup Outline in Menu Format The setup in menu format is not required during normal operation Use only when checking the contents of setup during maintenance or modifying setup contents required due to system operation 1 Key assignments Following num pad keys are used d...

Page 75: ... Shadow RAM Failed at offset nnnn W R error occured in Shadow RAM at displayed address Failing Bits nnnn Bit missing error occured by memory test Message displayed by Extended RAM test position 3 Message Error meaning nnnn K Extended RAM Failed at offset nnnn W R error occured in extended memory at displayed address Failing Bits nnnn Bit missing error occured by memory test Message displayed by CP...

Page 76: ...ty the POS device driver must be installed first Logo image is written into Flash ROM in the printer Loading logo image from application is needed only when changing logo image Function Loads a logo image to the ER 01PU or UP T80BP connected to the UP 5300 Also test printing can be done Image file to be loaded is a monochrome bitmap file Image data size must be smaller or equal to below list ER 01...

Page 77: ... 4 V S S B 2 6 V S S B 2 8 V S S H 0 2 V S S H 3 6 V S S K 0 2 V S S K 3 6 V S S M 0 2 V S S M 3 6 V S S P 0 2 V S S P 3 6 V S S R 0 2 V S S R 3 6 V S S T 0 2 V S S T 3 6 V S S U 3 5 V S S V 0 2 V S S V 3 6 V S S X 0 2 V S S X 3 6 V S S Z 0 2 V S S Z 3 6 V S S A B 0 2 V S S A B 3 6 V S S A D 0 2 V S S A D 3 6 V S S A F 0 2 V S S A F 3 6 V S S A H 0 2 V S S A J 3 7 V S S A L 3 7 V S S A M 0 8 V S S...

Page 78: ...Q 7 L 2 6 D A C K 7 J 2 3 D A C K 6 J 2 2 D A C K 5 K 2 6 D A C K 3 K 2 5 D A C K 2 K 2 4 D A C K 1 K 2 3 D A C K 0 K 2 2 S D 0 A D 2 6 S D 1 A D 2 5 S D 2 A D 2 4 S D 3 A E 2 6 S D 4 A E 2 5 S D 5 A F 2 6 S D 6 A F 2 5 S D 7 A F 2 4 S D 8 A E 2 4 S D 9 A F 2 3 S D 1 0 A E 2 3 S D 1 1 A D 2 3 S D 1 2 A F 2 2 S D 1 3 A E 2 2 S D 1 4 A D 2 2 S D 1 5 A C 2 2 S E L A T B P I O 1 4 A C 2 0 C M D P C I ...

Page 79: ...8 1 8 D 3 9 2 0 D 4 0 3 8 D 4 1 4 0 D 4 2 4 2 D 4 3 4 4 D 4 4 4 8 D 4 5 5 0 D 4 6 5 2 D 4 7 5 4 D 4 8 8 4 D 4 9 8 6 D 5 0 8 8 D 5 1 9 0 D 5 2 9 4 D 5 3 9 6 D 5 4 9 8 D 5 5 1 0 0 D 5 6 1 2 2 D 5 7 1 2 4 D 5 8 1 2 6 D 5 9 1 2 8 D 6 0 1 3 2 D 6 1 1 3 4 D 6 2 1 3 6 D 6 3 1 3 8 C A S 4 2 4 C A S 5 2 6 C A S 6 1 1 6 C A S 7 1 1 8 O E 7 3 S D A 1 4 1 S C L 1 4 2 N C 5 7 N C 5 8 N C 5 9 N C 6 0 N C 6 1 N ...

Page 80: ...7 S W 8 R S T S W 1 8 2 7 3 6 4 5 B R 1 4 1 0 K x 4 C 1 1 6 0 1 u F 1 B 2 F B 1 1 4 B L M 2 1 F 1 B 2 F B 1 2 3 B L M 2 1 F 1 B 2 F B 1 2 2 B L M 2 1 F 1 B 2 F B 1 2 1 B L M 2 1 V K B M C K M D T K D T K C K G N D G N D C 3 0 1 u 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 C N 2 5 2 0 3 0 1 6 1 0 M O L E X R 4 4 7 0 R 6 0 R 1 1 7 4 7 0 R 1 1 2 4 7 0 R 1 2 1 4 7 0 R 1 1 9 4 7 0 R 1 1 0 4 7 0 R 5 ...

Page 81: ... S T 6 8 D S 1 9 P C I C S S S 2 7 P C I S E L 1 2 5 P C I F S 2 4 P C I F L E 2 2 4 8 M 1 4 M S E L 0 2 1 S D C L K 6 S D A T A 7 P C I S T P 1 6 C P U S 1 5 V D D 1 V D D 2 0 V D D 2 6 V D D _ H O S T 1 2 9 V D D _ H O S T 3 4 1 4 G N D 4 G N D 1 1 G N D 1 7 G N D 2 3 I C 3 9 M K 1 4 9 2 0 4 F S 1 4 M F S C L K C P U C L K O S C 1 4 M R 1 9 3 3 R 1 8 3 3 R 1 7 3 3 R 1 5 3 3 2 1 C 2 6 1 0 p 2 1 C...

Page 82: ... C R D R T C A S R T C W R I R Q 8 I R Q 8 R 1 6 5 1 0 K R T C S D 6 S D 5 S D 4 S D 3 S D 2 S D 1 S D 0 R S T D R V R C L T P 1 T P 2 X 3 3 2 7 6 8 k H z V C C 2 V C C 5 5 6 7 8 1 2 3 4 S H D N 3 R E F 4 F B 2 G N D 8 V 5 C S 6 E X T 7 O U T 1 I C 4 1 M A X 1 6 5 1 R 2 3 1 2 W 0 0 3 3 F C 2 4 2 0 1 u C 1 4 1 0 0 u 1 0 V O S Q 7 S i 9 4 3 0 1 2 L 3 3 9 u H R 2 5 1 4 0 K F R 2 4 1 5 0 K F D 1 S F P...

Page 83: ... 6 P D 5 6 5 P D 6 6 4 P D 7 6 3 I R Q 5 P I N T R 2 A D R 9 4 D T R 2 J 9 3 D T R 1 J 8 3 R T S 2 J 9 1 R T S 1 J 8 1 T X D 2 I R T X 8 9 T X D 1 7 9 D R V D E N 0 1 I R Q I N P D I R 9 9 D A C K 3 J 9 6 M T R 1 J 5 M T R 0 J 2 A 1 0 9 7 D R Q 3 9 8 D R V 1 J 3 D R V 0 J 4 S T E P J 8 D I R 7 H D S E L J 1 1 W D A T A J 9 W G A T E J 1 0 I R Q 7 3 9 I R Q 6 4 0 I R Q 3 3 7 I R Q 4 3 8 F D R Q 5 2...

Page 84: ... 0 0 p C 1 6 7 1 0 0 0 p C 1 7 6 4 7 0 p C 1 7 4 4 7 0 p V C C 5 C 1 6 4 1 0 0 0 p C 1 6 5 1 0 0 0 p C 1 7 2 1 0 0 0 p R 1 6 2 2 2 C 1 6 3 1 0 0 0 p 1 8 2 7 3 6 4 5 B R 1 2 1 k x 4 1 8 2 7 3 6 4 5 B R 9 1 k x 4 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 C N 6 5 3 0 4 7 1 5 1 0 M O L E X P P 0 7 P P 0 P P 2 P P 4 P P 6 V C C 5 R 1 4 0 1 K P S T R O B P A U T O F D P I N I T P S L C T I N P P 0 7 P E...

Page 85: ... R 1 E R 1 S D 1 R D 1 C D 1 S E R I A L 1 C N C I 2 C S 2 R S 2 G N D E R 2 S D 2 R D 2 S E R I A L 2 C N 5 9 4 8 3 7 2 6 1 C N 1 0 3 D S U B 9 P I N C O N N E C T O R S D 2 R D 2 E R 2 C I 2 P V C C 5 2 1 P F 2 m i n i S M D 0 2 0 2 S 1 S S S 3 1 2 F 1 B 2 F B 1 1 2 B L M 3 1 F 1 B 2 F B 1 0 0 B L M 3 1 F 1 B 2 F B 1 5 B L M 3 1 F 1 B 2 F B 1 8 B L M 3 1 F 1 B 2 F B 1 4 B L M 3 1 1 2 V V C C 5 C...

Page 86: ... D 4 8 5 D 5 8 6 D 6 8 7 D 7 8 8 D 8 8 9 D 9 9 0 D 1 0 9 1 D 1 1 9 2 D 1 2 9 3 D 1 3 9 4 D 1 4 9 5 D 1 5 9 6 D 1 6 9 7 D 1 7 9 8 D 1 8 9 9 E 1 5 0 F 1 1 0 0 C N 8 8 8 0 0 1 0 0 1 7 0 S K E L A E N I O C H R D Y I O C H R D Y A E N V C C 5 S D 7 S D 6 S D 5 S D 4 S D 3 S D 2 S D 1 S D 0 S D 0 1 5 S D 0 1 5 S A 1 9 S A 1 8 S A 1 7 S A 1 6 S A 1 5 S A 1 4 S A 1 3 S A 1 2 S A 1 1 S A 1 0 S A 9 S A 8 R...

Page 87: ...B A 1 8 1 7 1 B A 8 1 7 3 B A 7 1 7 4 B A 6 1 7 5 B A 5 1 7 6 B A 4 1 7 7 B A 3 1 7 8 B A 2 1 7 9 B A 1 1 8 0 B A 0 1 8 1 M R O S 1 8 4 F R O S 0 1 8 5 F R O S 1 1 8 6 F R O S 2 1 8 7 F R O S 3 1 8 8 F R O M P 1 8 9 F R O M W P 1 9 0 I S 6 1 9 1 T X D 1 5 6 R X D 1 5 7 D T R 1 5 8 D S R 1 5 9 R T S 1 6 0 C T S 1 6 1 D C D 1 6 2 R I 1 6 3 T X D 2 4 7 R X D 2 4 8 D T R 2 4 9 D S R 2 5 0 R T S 2 5 1 ...

Page 88: ...0 0 T S A 1 3 S A 1 2 S A 1 1 S A 1 0 S A 9 S A 8 S A 7 S A 6 S A 5 S A 4 S A 3 S A 2 S A 1 S A 0 S D 0 S D 1 S D 2 S D 4 S D 5 S D 6 S D 7 S D 8 S D 9 S o c k e t B A 0 B A 1 B A 2 B A 3 B A 4 S D 3 S D 1 0 S D 1 1 S D 1 2 S D 1 3 S D 1 4 S D 1 5 A 0 3 2 A 1 2 8 A 2 2 7 A 3 2 6 A 4 2 5 A 5 2 4 A 6 2 3 A 7 2 2 A 8 2 0 D Q 1 5 5 2 D Q 0 3 3 D Q 1 3 5 D Q 2 3 8 D Q 3 4 0 D Q 4 4 4 D Q 5 4 6 D Q 6 4 ...

Page 89: ...R A S 0 C 1 4 6 0 1 u C 7 1 0 u 1 0 V O S C 1 4 3 1 0 0 p C 1 4 0 1 0 0 p V R A M S D 1 0 S D 1 1 S D 1 2 S D 1 3 S D 1 4 S D 1 5 F R O M B Y F R O M W P F R O M R P F R O S 2 F R O S 1 M R O S B A 1 8 F R O M W P F R O M R P F R O S 2 F R O S 1 M R O S B A 0 B A 1 B A 2 B A 3 B A 4 B A 5 B A 6 B A 1 8 P R F S H P R A S 2 P R A S 1 S A 1 7 S A 1 6 S A 1 5 S A 1 4 S A 1 3 F R O M B Y P R A S 2 P R ...

Page 90: ... 1 S D 3 R D 3 D R 3 C S 3 G N D S E R I A L 3 C N 1 3 2 J 1 P V C C 5 R S 4 E R 4 S D 4 R D 4 D R 4 C S 4 G N D G N D S E R I A L 4 C N 1 2 3 4 5 6 7 8 C N 1 0 1 T M 1 1 R 3 C 8 8 S D 4 R D 4 E R 4 D R 4 R S 4 F B 1 9 B L M 3 1 F B 2 2 B L M 3 1 F B 2 1 B L M 3 1 F B 2 3 B L M 3 1 F B 2 0 B L M 3 1 1 2 V V C C 5 C 1 1 9 0 1 u C 1 0 2 2 2 0 p C 1 0 1 2 2 0 p 1 4 1 5 1 2 1 3 1 0 1 1 8 1 1 6 3 2 5 4...

Page 91: ...D R 5 R S 5 C S 5 V R A M F 1 B 2 F B 3 6 B L M 3 1 F 1 B 2 F B 3 5 B L M 3 1 F 1 B 2 F B 3 4 B L M 3 1 F 1 B 2 F B 3 3 B L M 3 1 S E R I A L 5 C N 1 2 3 4 5 6 7 8 9 1 0 C N 1 0 9 M L X 5 3 0 1 4 1 0 1 0 F 1 B 2 F B 3 2 B L M 3 1 F 1 B 2 F B 3 1 B L M 3 1 1 3 1 2 0 0 I C 2 4 F 7 4 V H C 0 4 C 1 6 2 1 0 0 p R T S 5 C T S 5 1 1 1 0 0 0 I C 2 4 E 7 4 V H C 0 4 1 3 5 B U I L T I N P R I N T E R I F 5 ...

Page 92: ... 2 5 4 7 6 9 I C 7 M C 1 4 5 4 0 6 C 1 2 4 0 1 u T X D 6 T X D 6 D T R 6 D S R 6 D S R 6 D T R 6 1 2 V R 1 0 6 1 2 k C 1 2 2 2 2 0 p D R 6 S D 6 D R 6 S D 6 E R 6 D R 6 R 1 0 5 1 0 0 k R 1 0 4 3 3 k F 1 B 2 F B 1 1 3 B L M 3 1 P V C C 5 P O L E C N R E A R C N 1 2 3 4 5 6 7 C N 1 M O L E X 5 3 0 1 4 0 7 1 0 1 3 6 V F D I F 6 9 1 6 2 0 8 7 6 5 4 3 2 1 A B C D 1 2 3 4 5 6 7 8 D C B A 8 27 ...

Page 93: ...4 L S 1 2 5 1 2 1 1 1 3 I C 6 D 7 4 L S 1 2 5 X 4 X 5 X 6 W M F C N F 1 B 2 F B 1 0 6 B L M 3 1 F 1 B 2 F B 1 1 0 B L M 3 1 F 1 B 2 F B 1 0 9 B L M 3 1 X 2 X 3 F 1 B 2 F B 1 1 6 B L M 3 1 F 1 B 2 F B 1 1 5 B L M 3 1 S 3 S 2 S 1 V C C 5 2 3 1 I C 1 2 A 7 4 L S 1 2 5 5 6 4 I C 1 2 B 7 4 L S 1 2 5 9 8 1 0 I C 1 2 C 7 4 L S 1 2 5 R 1 1 1 3 3 k R 1 0 9 2 2 k V C C 5 3 2 1 8 4 I C 1 3 A K I A 3 9 3 5 V ...

Page 94: ... F B 2 7 B L M 3 1 F 1 B 2 F B 2 9 B L M 3 1 F 1 B 2 F B 3 0 B L M 3 1 1 4 2 3 B R 4 4 7 k x 2 1 8 2 7 3 6 4 5 B R 2 4 7 k x 4 1 8 2 7 3 6 4 5 B R 1 1 0 k x 4 1 4 2 3 B R 3 1 0 k x 2 C L S 1 R D D 1 R C P 1 1 2 I C 5 A 4 0 6 9 3 4 I C 5 B 4 0 6 9 5 6 I C 5 C 4 0 6 9 9 8 I C 5 D 4 0 6 9 C L S 2 R D D 2 R C P 2 1 1 1 0 I C 5 E 4 0 6 9 1 3 1 2 I C 5 F 4 0 6 9 1 3 8 M C R I F 8 9 1 8 2 0 8 7 6 5 4 3 2...

Page 95: ... 3 C N 1 0 5 5 0 4 5 0 3 A C 1 0 1 u R 2 6 8 k l i n k a t c l s c h c l e r k s c h c p u s c h d r a m s c h f d d _ p a r a s c h k e y _ i d e s c h m c r i f s c h p o w e r s c h p r t i f s c h p s c 2 s c h p s r a m s c h r o m s c h r s 3 _ 4 s c h r t c s c h s u p e r i o s c h v f d i f s c h r s 1 _ 2 s c h s l o t s c h D S 1 2 V R 1 0 1 2 7 k R 1 0 0 1 k R 1 0 2 4 7 k C 1 0 7 1 0 0...

Page 96: ... S 3 T 2 E P V C C 5 A C L 1 2 3 C N 9 M L X 5 3 0 1 4 0 3 1 0 V C C 3 L 2 3 5 u H C 1 7 1 0 u 1 0 V O S C 1 9 3 0 1 u V R A M V C C 5 P H O L D P H S N S 5 6 7 8 2 3 4 5 6 7 8 4 D 1 1 0 1 S S 3 2 2 Q 6 S I 9 4 1 0 D Y C 1 8 7 0 1 u Q 5 S I 9 4 1 0 D Y D 1 0 9 S F P B 7 2 L 1 1 0 u H 3 A R 8 1 2 W 0 0 2 5 C 9 2 2 0 u 6 3 V O S C 1 1 0 1 u V C C 5 C 8 2 2 u 3 5 V x 2 C 1 0 C 1 8 5 0 1 u S S 1 B S T...

Page 97: ...5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 4 4 4 5 4 6 4 7 4 8 4 9 5 0 5 1 5 2 5 3 5 4 5 5 5 6 5 7 5 8 5 9 6 0 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 7 0 7 1 7 2 7 3 7 4 7 5 7 6 7 7 7 8 7 9 8 0 C N 3 0 0 5 2 7 7 5 0 8 0 9 F R A M E I R D Y D E V S E L S T O P T R D Y C P A R R S T D R V A D 2 1 A D 2 0 A D 1 9 A D 1 8 A D 1 7 A D 1 6 A D 1 5 A D 1 4 A D 1 3 A D 1 2 A D ...

Page 98: ...9 A 2 0 2 0 A 2 1 2 1 A 2 2 2 2 A 2 3 2 3 A 2 4 2 4 A 2 5 2 5 A 2 6 2 6 A 2 7 2 7 A 2 8 2 8 A 2 9 2 9 A 3 0 3 0 A 3 1 3 1 C 1 3 2 C 2 3 3 C 3 3 4 C 4 3 5 C 5 3 6 C 6 3 7 C 7 3 8 C 8 3 9 C 9 4 0 C 1 0 4 1 C 1 1 4 2 C 1 2 4 3 C 1 3 4 4 C 1 4 4 5 C 1 5 4 6 C 1 6 4 7 C 1 7 4 8 C 1 8 4 9 B 1 5 1 B 2 5 2 B 3 5 3 B 4 5 4 B 5 5 5 B 6 5 6 B 7 5 7 B 8 5 8 B 9 5 9 B 1 0 6 0 B 1 1 6 1 B 1 2 6 2 B 1 3 6 3 B 1 ...

Page 99: ...B M C K M D T K D T K C K 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 C N 3 5 2 0 3 0 1 6 1 0 M O L E X 4 6 2 1 7 5 3 9 8 C N 4 T C S 7 5 6 7 0 1 4 0 1 H O S I D E N V S S V C C V C C L 1 L Q H 3 C x x 3 4 X 1 8 M H z G N D Y D L P G N D P R 1 V C O N D I S P L C D O N 1 t o L C D R E L A Y P W B X C K X C K 1 1 2 C N 2 5 3 0 1 5 0 2 1 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 ...

Page 100: ... V S W 1 6 B U L B 1 5 B A T 1 4 R O Y E R 1 3 I C 5 0 1 A L T 1 1 8 4 1 2 3 4 M 6 0 0 4 3 0 1 3 4 P M I T S U M I R 6 0 2 A 2 2 0 K C 1 0 3 1 0 0 0 p F R 5 0 1 A 1 2 K F 5 1 2 3 4 C 5 0 1 A 2 2 u F 5 0 V C 6 0 1 A 0 0 8 2 u F 1 0 0 V C 5 0 2 A 2 2 u F 1 6 V R 6 0 3 A 2 2 K L 5 0 1 A 1 0 0 u H Q 6 0 1 A D 2 3 9 1 D 6 0 1 A S F P B 5 4 R 6 0 1 A 1 0 0 K C 5 0 3 A 1 0 u F 1 6 V O S C 6 0 2 A 1 u F 1...

Page 101: ... D L 4 D L 5 D L 6 D L 7 G N D D L 0 D L 1 G N D D L 2 D L 3 G N D D U 4 D U 5 G N D D U 0 D U 1 D U 2 D U 3 D I S P V D D V D D V C O N X C K G N D L P Y D G N D 1 3 5 7 9 1 1 1 3 1 5 1 7 1 9 2 1 2 3 2 5 2 7 2 9 2 4 6 8 1 0 1 2 1 4 1 6 1 8 2 0 2 2 2 4 2 6 2 8 3 0 3 1 C N 1 C L 5 4 0 0 0 6 3 0 3 1 D U 6 D U 7 G N D D U 0 7 D U 3 D U 4 D U 2 D U 5 D U 1 G N D D U 0 D U 6 G N D D U 7 D I S P V C O N...

Page 102: ...C H A P T E R 9 P W B L A Y O U T 1 M a i n P W B F o r c o m p o n e n t s p r o d u c e d i n J a n u a r y 1 9 9 9 A S i d e 9 1 ...

Page 103: ... B S i d e 9 2 ...

Page 104: ...2 M a i n P W B F o r c o m p o n e n t s p r o d u c e d i n F e b r u a r y 1 9 9 9 a n d o n w a r d A S i d e 9 3 ...

Page 105: ... B S i d e 9 4 ...

Page 106: ...3 V G A P W B A S i d e B S i d e 9 5 ...

Page 107: ...4 R i s e r P W B A S i d e B S i d e 5 T P S w i t c h P W B S w i t c h P W B 9 6 ...

Page 108: ...6 I N V E R T E R P W B A S i d e B S i d e 7 L C D R E L A Y P W B A S i d e B S i d e 9 7 ...

Page 109: ...PWB unit 9 SW PWB unit F LCD PWB unit G Service options Service tools Index Because parts marked with is indispensable for the machine safety maintenance and poeration it must be replaced with the parts specific to the product specification SHARP CORPORATION This document has been published to be used for after sales service only The contents are subject to change without notice UP 5300U UP 5300U ...

Page 110: ...B H Z Z AH D Invertor cover 25 C P W B N 2 7 9 4 B H 0 1 BQ E Inverter PWB unit 26 V V L L M 1 0 V 3 3 1 CS B LCD DSTN LM10V33 28 P G U M M 6 7 3 1 B H Z Z AR C T P gum B 29 P G U M M 6 7 3 3 B H Z Z AR C LCD gum B 30 P G U M M 6 7 3 2 B H Z Z AS C LCD gum A 31 H P N L C 6 8 3 9 R C Z Z BT C Touch panel 32 P G U M M 6 7 3 4 B H Z Z AL C T P gum C 33 P G U M M 6 7 3 0 B H Z Z AS C T P gum A 34 G C ...

Page 111: ... 1 2 3 4 5 6 7 8 9 6 11 12 14 15 16 17 18 19 15 15 18 15 23 22 28 28 8 10 14 21 24 25 26 30 29 31 32 33 30 29 34 28 33 28 32 35 36 15 18 42 39 40 39 41 37 38 44 43 15 47 48 49 A 45 43 46 B 51 52 10 52 C 51 51 UP 5300U UP 5300U 2 ...

Page 112: ...P B Z 4 0 P 0 6 K 0 0 AA C Screw M4 6K 29 C P W B X 2 8 2 7 B H 0 1 BX N E VGA PWB unit 30 C P W B X 2 8 2 6 B H 0 1 DQ N E Main PWB unit 31 L H L D W 2 3 7 5 B H Z Z AH N C Spacer 2 32 Q C N W 3 0 1 2 B H Z Z AL N C Flat cable 16P 33 Q C N W 7 8 6 3 B H Z Z AT C PS cable 34 L H L D W 2 3 7 4 B H Z Z AG N C Spacer 1 35 C P W B N 2 8 2 9 B H 0 1 BA N E Switch PWB unit 36 L C H S M 6 7 0 9 B H Z A A...

Page 113: ... 2 40 45 43 42 47 46 48 52 51 54 59 38 56 47 39 2 36 44 47 2 2 2 47 59 55 20 B 59 20 1 3 1 1 2 2 19 20 4 21 26 26 28 27 25 2 2 23 24 7 15 33 6 2 16 17 18 20 37 5 2 2 34 34 31 23 29 32 2 35 13 30 59 49 50 53 53 C 27 A 22 12 61 60 UP 5300U UP 5300U 4 ...

Page 114: ...AE D Vinyl bag 640 560mm 4 S P A K A 8 4 5 5 B H Z Z AN D Packing add L 5 S S A K H 3 0 1 5 C C Z Z AA D Vinyl bag 200 300mm 6 T I N S E 2 3 7 7 B H Z Z BM N D Instruction book 10 S S A K H 4 2 3 1 C C Z Z AA D Vinyl bag 140 500mm 11 T C A D H 6 7 8 8 B H Z A AC D Caution card Black 12 U B N D A 6 6 3 0 B H Z Z AK C AC cord band 3 Packing material Accessories PSP00026 1 2 3 4 5 6 10 11 12 UP 5300U...

Page 115: ...C14 31 V H I M 5 1 1 3 A 2 Q F P BB B IC M5113 IC15 32 V H I S N 7 4 H C 0 4 D R AG B IC SN74HC04DR SOP T IC16 20 33 V H I M 3 8 8 0 2 M 2 7 0 BA B IC M38802M270 IC17 34 V H I 5 1 V 8 5 1 2 T 1 2 BG B IC 4M PSRAM TC51V8512AFT IC18 19 35 V H I S N 7 4 H C 3 2 D R AG B IC SN74HC32DR IC21 33 36 V H I S N 7 4 H C 0 0 D R AG B IC SN74HC00DR IC22 37 V H I S N 7 4 H C 0 8 D R AL B IC SN74HC08DR D014 TAPP...

Page 116: ... 145 146 147 95 V H V I C P S 1 0 1 AF B IC protector ICPS1 0 IF100 96 V S D T C 1 1 4 Y K 1 AC B Transistor DTC114YK Q101 102 103 97 V S D T C 1 2 4 G K 1 AC B Transistor DTC124GK Q100 98 V S 2 S J 1 8 7 1 AF B Transistor 2SJ187 Q104 99 V R S T S 2 A D 4 7 1 J AA C Resistor 1 10W 470Ω 5 R110 112 117 119 121 100 V R S T S 2 A D 1 0 3 J AA C Resistor 1 10W 10KΩ 5 R113 114 115 116 118 120 126 127 V ...

Page 117: ...2 7 R C Z Z AE C Chip core ACA3216M4S 120 FB300 302 303 307 308 7 V H I 4 1 6 V 2 5 4 T L 6 AX B IC 4MB DRAM 416V254DT L6 IC300 301 8 V H I 7 4 H C T 2 4 4 A F AK B IC 74HCT244 IC302 306 307 9 V H I 7 4 H C T 0 8 A N S AE B IC 74HCT08 IC303 10 V H I 7 4 H C T 0 0 A N S AH N B IC 74HCT00 IC304 11 V H I M N 8 9 3 0 5 1 BG B IC MN89305 IC305 12 R C R S Z 2 3 9 6 R C Z Z AL B X TAL 25 175MHZ X300 13 V...

Page 118: ... 3 R C I L C 6 6 6 7 B H Z Z AN C Coil A814AY 101K 100µH SMD L501A 4 R T R N H 9 5 2 1 B H Z Z BB B Transformer 841TN 1157 T501A 5 V H I L T 1 1 8 4 C S 1 BE B IC LT1184 IC501A 6 V C E A P S 1 C C 2 2 5 M AF C Capacitor 2 2µF 16V C501A 7 V C E A P S 1 C C 2 2 6 M AC C Capacitor 16WV 22µF C502A 8 V R S T S 2 A D 1 3 3 F AA C Resistor 1 10W 13KΩ 1 R501A 9 V R S T S 2 A D 4 7 2 J AA C Resistor 1 10W ...

Page 119: ...W MARK PART RANK DESCRIPTION 1 Q C N W 7 8 5 8 B H Z Z BL S Connector cable for Dongle LPT 1 Relay line from terminal to Dongle 2 D K I T 8 6 7 1 R C Z Z S HDD mounting kit 3 G C O V H 7 1 3 8 B H Z Z AL D HDD cover A 4 G C O V H 7 1 3 9 B H Z Z AN D HDD cover B 5 L A N G K 7 6 2 0 B H Z Z AE C HDD plate 6 L X B Z 6 7 9 4 B H Z Z AE C Screw M3 14 101 D K I T 8 6 5 6 B H Z Z S Service tool kit ISA ...

Page 120: ...UMM6730BHZZ 1 33 AS C PARTS CODE NO PRICE RANK NEW MARK PART RANK PGUMM6731BHZZ 1 28 AR C PGUMM6732BHZZ 1 30 AS C PGUMM6733BHZZ 1 29 AR C PGUMM6734BHZZ 1 32 AL C PRDAF2350BHZZ 2 18 AR N C PSHEG2859BHZZ 1 38 AV C PSHEG6863RCZZ 2 19 AR C PSHEP2471BHZZ 1 45 AH C PSHEP2472BHZZ 1 44 AH C PSHEP6859BHZZ 2 17 AN C Q QACCD8411BHZZ 2 52 AV B QCNCM2656RC0C 7 1 AE C QCNCM2788BH0I 4 143 BL C QCNCM2806RC8J 4 75...

Page 121: ...B C VCEAPS1CC106M 4 14 AC C VCEAPS1CC225M 7 6 AF C VCEAPS1CC226M 7 7 AC C VCEAPS1CC336M 6 13 AF C VCEAPS1EC476M 4 11 AF C VCEAPS1VC226M 4 12 AC C PARTS CODE NO PRICE RANK NEW MARK PART RANK VCKYTV1CB334K 4 88 AC C VCKYTV1CF105Z 4 87 AB C 5 2 AB C 7 11 AB C VCKYTV1HB102K 4 19 AA C 4 81 AA C 5 17 AA C 6 27 AA C 7 12 AA C VCKYTV1HB103K 4 89 AB C VCKYTV1HB182K 6 14 AA C VCKYTV1HB472K 6 15 AA C VCKYTV1...

Page 122: ...751J 4 114 AA C VRS TS2AD822J 4 113 AA C 6 24 AA C VRS TS2HD130J 4 70 AD N C VRSTE2HFR025F 4 66 AE C VRSTE2HFR033F 4 67 AE C VS2SD2391 1 7 18 AD B VS2SJ187 1 4 98 AF B 5 14 AF B VSDTA124EK 1 6 25 AD B VSDTA144EK 1 4 52 AC B VSDTC114YK 1 4 53 AC B 4 96 AC B VSDTC124GK 1 4 97 AC B VSDTC124TK 1 6 26 AD B VSSI9410DY 1 4 54 AK B VSSI9430DY 1 4 55 AL B VVLLM10V33 1 1 26 CS B X XBBSD30P04000 2 7 AA C XBB...

Page 123: ...ored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without prior written permission of the publisher SHARP CORPORATION Information Systems Group Quality Reliability Control Center Yamatokoriyama Nara 639 1186 Japan 1999 February Printed in Japan T ...

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