Schweitzer Engineering Laboratories SEL-700G Series, Instruction Manual

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10.14
SEL-700G Relay Instruction Manual Date Code 20170814
Testing and Troubleshooting
Self-Test
Front-Panel HMI (power up)
Fail if ID registers do not match expected or if
FPGA programming is unsuccessful
No Not
Latched
Yes NA STA C, to clear
the warning in the
status report.
Contact SEL if
failure returns.
External RAM (power up)
Performs a read/write test on system RAM
Yes Latched No No
External RAM (run time)
Performs a read/write test on system RAM
Yes Latched Yes Status Fail
RAM Failure
Automatic restart
a
Internal RAM (power up)
Performs a read/write test on system CPU RAM
Yes Latched No No
Internal RAM (run time)
Performs a read/write test on system CPU RAM
Yes Latched Yes Status Fail
RAM Failure
Automatic restart
a
Code Flash (power up)
SELBOOT qualifies code with a checksum
NA NA NA NA
Data Flash (power up)
Checksum is computed on critical data
Yes Latched Yes Status Fail
Non_Vol Failure
Data Flash (run time)
Checksum is computed on critical data
Yes Latched Yes Status Fail
Non_Vol Failure
Critical RAM (settings)
Performs a checksum test on the active copy of
settings
Yes Latched Yes Status Fail
CR_RAM
Failure
Automatic restart
a
Critical RAM (run time)
Verify instruction matches FLASH image
Yes Latched Yes Status Fail
CR_RAM
Failure
Automatic restart
a
I/O Board Failure
Check if ID register matches part number
Yes Latched Yes Status Fail
Card [C|D|E]
Failure
DeviceNet Board Failure
DeviceNet card does not respond in three
consecutive 300 ms time out periods
NA NA NA COMMFLT
Warning
Slot Z Board (power up)
Fail if ID register does not match part number
Yes Latched Yes Status Fail
CT Card Fail
Slot Z Board A/D Offset Warn
Measure dc offset at each input channel
–50 mV to
+50 mV
No Not
Latched
No NA STA C, to clear
the warning in the
status report.
Contact SEL if
failure returns.
ADCCHK (Slot Z)
A/D reference channel check
<2.375 V
or
>2.625 V
Yes Latched Yes Status Fail
Card Z Fail
Automatic restart
a
Slot E Board (power up)
Fail if ID register does not match part number
Yes Latched Yes Status Fail
Card E Fail
Slot E Board A/D Offset Warn
Measure dc offset at each input channel
–50 to
+50 mV
No Not
Latched
No NA STA C, to clear
the warning in the
status report.
Contact SEL if
failure returns.
Table 10.9 Relay Self-Tests (Sheet 2 of 4)
Self-Test Description Normal
Range
Protection
Disabled
on Failure
Alarm
Status
Auto
Message
on Failure
Front Panel
Message
on Failure
Corrective
Action