Schiller AT-102, Service Handbook

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Annex
A.4
AT-102 Service Handbook
DS.. Data strobe.
DSP.. Digital signal processor (on program pack).
DTACK Transfer data acknowledge. Bus signal to acknowledge transfer of data.
DTR Outgoing serial data, turns modem ON.
ECGI ECG in - serial ECG data to the CPU sent over the optical interface.
ECGMUX The multiplexed ECG signal from the ECG amplifier.
ECGO ECG out - serial ECG amplifier control data from the CPU sent over the optical
interface.
EF Empty flag.
EJCT Eject (paper tray).
EKGRES Reset signal to the ECG amplifier. This signal resets the ECG amplifier to
recenter the ECG image on the LCD.
FIFOR First in first out read
FLM Control signal for frame synchronisation of the LCD.
FPIN Input for floating point co-processor.
FWR Flag read / write.
HREN Output enable signal for thermal print head data (History enable).
HSYNC Horizontal synchronisation (video / VGA output).
IPL0..2 Interrupt priority level (binary encoded).
IREG Control signal from the current detector and limiter circuit on the power supply to
regulate supply.
ISYS Interrupt system (2 kHz).
KB.. Keyboard data in.
KBBEEP Keyboard beep (to audio amplifier).
KBCLR Keyboard clear.
KBCL1 Keyboard clock.
KBCL2 Keyboard clock.
KBIN Keyboard data in - serial data from the keyboard to the CPU.
KBS.. Keyboard strobe.
KONV Convert - this signal initiates the conversion of the incoming signal from the ECG
amplifier.
LA Left arm.
LEDB Battery LED.