Preliminary
PRODUCT OVERVIEW
S3C2451X RISC MICROPROCESSOR
1-42
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Register Name
Address
Reset Value
Acc.
Unit
Read/
Write
Function
DISRC1
0x4B000100
W
R/W
DMA 1 initial source
DISRCC1
0x4B000104
R/W
DMA 1 initial source control
DIDST1 0x4B000108
R/W DMA 1 initial destination
DIDSTC1
0x4B00010C
R/W
DMA 1 initial destination control
DCON1
0x4B000110
R/W
DMA 1 control
DSTAT1
0x4B000114
R
DMA 1 count
DCSRC1
0x4B000118
R
DMA 1 current source
DCDST1
0x4B00011C
R
DMA 1 current destination
DMASKTRIG1
0x4B000120
R/W
DMA 1 mask trigger
DMAREQSEL1
0x4B000124
R/W
DMA1 Request Selection Register
DISRC2
0x4B000200
W
R/W
DMA 2 initial source
DISRCC2
0x4B000204
R/W
DMA 2 initial source control
DIDST2 0x4B000208
R/W DMA 2 initial destination
DIDSTC2
0x4B00020C
R/W
DMA 2 initial destination control
DCON2
0x4B000210
R/W
DMA 2 control
DSTAT2
0x4B000214
R
DMA 2 count
DCSRC2
0x4B000218
R
DMA 2 current source
DCDST2
0x4B00021C
R
DMA 2 current destination
DMASKTRIG2
0x4B000220
R/W
DMA 2 mask trigger
DMAREQSEL2
0x4B000224
R/W
DMA2 Request Selection Register
DISRC3
0x4B000300
W
R/W
DMA 3 initial source
DISRCC3 0x4B000304
R/W DMA
3
initial source control
DIDST3
0x4B000308
R/W
DMA 3 initial destination
DIDSTC3 0x4B00030C
R/W
DMA
3 initial destination control
DCON3
0x4B000310
R/W
DMA 3 control
DSTAT3
0x4B000314
R
DMA 3 count
DCSRC3
0x4B000318
R
DMA 3 current source
DCDST3
0x4B00031C
R
DMA 3 current destination
DMASKTRIG3
0x4B000320
R/W
DMA 3 mask trigger
DMAREQSEL3
0x4B000324
R/W
DMA3 Request Selection Register
DISRC4
0x4B000400
W
R/W
DMA 4 initial source
DISRCC4
0x4B000404
R/W
DMA 4 initial source control
DIDST4 0x4B000408
R/W DMA 4 initial destination
DIDSTC4
0x4B00040C
R/W
DMA 4 initial destination control
DCON4
0x4B000410
R/W
DMA 4 control
DSTAT4
0x4B000414
R
DMA 4 count