Samsung S3C2451X, User Manual

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Preliminary
SYSTEM CONTROLLER S3C2451X RISC MICROPROCESSOR
2-28
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
The AHB and APB clocks are en/disabled by HCLKCON register. All reserved bits have 1 value at initial state.
HCLKCON Bit Description Initial Value
RESERVED [31:21] - 0x7FF
2D [20] Enable HCLK into 2D 1
DRAMC [19] Enable HCLK into DRAM controller 1
SSMC [18] Enable HCLK into the SSMC block 1
CFC [17] Enable HCLK into the CF 1
HSMMC1 [16] Enable HCLK into the HSMMC1 1
HSMMC0 [15] Enable HCLK into the HSMMC0 1
RESERVED [14] - 1
IROM [13] Enable HCLK into the IROM 1
USBDEV [12] Enable HCLK into the USB device 1
USBHOST [11] Enable HCLK into the USB HOST 1
RESERVED
[10] - 1
DISPCON [9] Enable HCLK into the display controller 1
CAMIF [8] Enable HCLK into the camera interface 1
DMA0~7 [7:0] Enable HCLK into DMA channel 0~7 0xFF
PCLKCON Bit Description Initial Value
RESERVED [31:20] - 0xFFF
PCM [19] Enable PCLK into the PCM 1
RESERVED
[18] - 1
I2S_1 [17] Enable PCLK into the I2S_1 1
I2C_1 [16] Enable PCLK into the I2C_1 1
CHIP_ID [15] Enable PCLK into the CHIP_ID 1
SPI_HS_1 [14] Enable PCLK into the SPI_HS1 (into SPI2.0) 1
GPIO [13] Enable PCLK into the GPIO 1
RTC [12] Enable PCLK into the RTC 1
WDT [11] Enable PCLK into the watch dog timer 1
PWM [10] Enable PCLK into the PWM 1
I2S_0 [9] Enable PCLK into the I2S_0 (I2S
Æ
I2S0) 1
AC97 [8] Enable PCLK into the AC97 1
TSADC [7] Enable PCLK into the TSADC 1
SPI_HS_0 [6] Enable PCLK into the SPI_HS0 (HS
Æ
HS0) 1
RESERVED [5] - 1
I2C_0 [4] Enable PCLK into the I2C_0 (I2C
Æ
I2C0) 1
UART0~3 [3:0] Enable PCLK into the UART0~3 0xF