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Preliminary
S3C2451X RISC MICROPROCESSOR
DMA CONTROLLER
9-9
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
DMA INITIAL SOURCE CONTROL REGISTER (DISRCC)
Register Address
R/W
Description
Reset
Value
DISRCC0 0x4B000004
R/W
DMA0
Initial
Source Control Register
0x00000000
DISRCC1 0x4B000104
R/W
DMA1
Initial
Source Control Register
0x00000000
DISRCC2 0x4B000204
R/W
DMA2
Initial
Source Control Register
0x00000000
DISRCC3 0x4B000304
R/W
DMA3
Initial
Source Control Register
0x00000000
DISRCC4 0x4B000404
R/W
DMA4
Initial
Source Control Register
0x00000000
DISRCC5 0x4B000504
R/W
DMA5
Initial
Source Control Register
0x00000000
DISRCC6 0x4B000604
R/W
DMA6
Initial
Source Control Register
0x00000000
DISRCC7 0x4B000704
R/W
DMA7
Initial
Source Control Register
0x00000000
DISRCn Bit
Description
Initial
State
LOC
[1]
Bit 1 is used to select the location of source.
0: the source is in the system bus (AHB),
1: the source is in the peripheral bus (APB)
0
INC
[0]
Bit 0 is used to select the address increment.
0 = Increment
1= Fixed
If it is 0, the address is increased by its data size after each transfer
in burst and single transfer mode.
If it is 1, the address is not changed after the transfer (In the burst
mode, address is increased during the burst transfer, but the
address is recovered to its first value after the transfer).
0