phyCORE-LPC2292/94
©
PHYTEC Messtechnik GmbH 2006 L-658e_5
Index of Figures
Block Diagram phyCORE-LPC2292/94 ................................... 6
Top View of the phyCORE-LPC2292/94 ................................. 7
Bottom View of the phyCORE-LPC2292 ................................. 8
Numbering of the Jumper Pads................................................ 17
Location of the Jumpers (Top View)....................................... 17
Location of the Jumpers (Bottom View) ................................. 18
phyCORE-LPC2292/94 Memory Model ................................ 51
Ethernet Connection to LPC2292/94 Controller ..................... 59
JTAG Interface (Top View)..................................................... 65
JTAG Interface (Bottom View) ............................................... 66
debugCORE-LPC2292/94 (Top View) ................................... 69
debugCORE-LPC2292/94 (Bottom View).............................. 70
Physical Dimensions................................................................ 73
Numbering of Jumper Pads ..................................................... 81
Location of the Jumpers (View of the Component Side) ........ 81
Default Jumper Settings of the phyCORE
Development Board HD200 with phyCORE-LPC2292/94 .... 82
Connecting the Supply Voltage at X1 ..................................... 85
Summary of Contents for phyCORE-LPC2292/94
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Page 144: ...Published by PHYTEC Me technik GmbH 2006 Ordering No L 658e_5 Printed in Germany...