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Intel

®

41210 Serial to Parallel PCI

Bridge Evaluation Board

User’s Guide

October 2004

Order Number:

278947-002

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Summary of Contents for 41210

Page 1: ...Intel 41210 Serial to Parallel PCI Bridge Evaluation Board User s Guide October 2004 Order Number 278947 002 ...

Page 2: ...tions Intel may make changes to specifications and product descriptions at any time without notice The Intel 41210 Serial to Parallel PCI Bridge may contain design defects or errors known as errata which may cause the product to deviate from published specifications Current characterized errata are available on request Contact your local Intel sales office or your distributor to obtain the latest ...

Page 3: ...rs and Connectors Location 7 Tables 1 DIP Switch Operation PCI X and PCI Clock Frequency 8 2 DIP Switch Operation SMBUS ADRESS 8 3 Jumper Connections JTAG Port 9 4 Jumper Connections Microcontroller I2C interface 9 5 Jumper Connections GNT A and B Header 9 6 Jumper Connections REQ A and B Header 10 7 Jumper Connections J13 J14 and J17 10 8 Jumper Connections QSWITCH EN Header 10 ...

Page 4: ...tion October 2004 002 Updated naming terminology in Sections 2 0 and 3 0 Corrected PCI Bus name Header Connectors J5 and J6 in Section 4 0 Corrected Switch S3 and S4 PCI X 66 MHZ Pos 3 settings in Table 1 December 2003 001 This is the first release of this document ...

Page 5: ...ed in an intelligent subsystem Build and evaluate a system Testing of the 41210 Bridge feature set 3 0 Features The 41210 Bridge evaluation board has the following features Complies fully with Protocol and electrical standards of the PCI Local Bus Specification Revision 2 3 PCI X Bridge Architecture Rev 1 0 B PCI Express Base Specification Rev 1 0A PCI Express Card Electrical Mechanical Specificat...

Page 6: ... PCI X 100 66 MHz card slot J8 is the PCI X 133 MHz card slot MICTOR connectors U14 17 and U19 20 provide test points for the 64 bit S_AD signals Header Connectors J3 and J4 provides test points for the PCI Bus A REQ GNT signals Header Connectors J5 and J6 provides test points for the PCI Bus B REQ GNT signals J1 is the JTAG connector J15 provides access to the Microcontroller S1 S3 S4 are option ...

Page 7: ...e Evaluation Board switches The switches should be set before powering up the system Figure 2 shows the Evaluation board switches Note When a switch is ON it is Closed B2762 01 J18 F1 FAN J13 J17 J15 J1 J5 J6 J10 J9 J7 J11 J12 S3 S4 J14 U18 U22 U23 3 3 V GND 12 V GND Intel 41210 Microcontroller 2003 IQ41210 REV B 41210 BRIDGE EVALUATION BOARD MADE IN USA REV S N PROG INTERFACE JTAG B GNT B REQ PCI...

Page 8: ...10 Evaluation Board jumpers Switch Function Pos 1 Pos 2 Pos 3 Pos 4 S3 Selects Secondary A PCI X 133 MHz Open Open Open NA S3 Selects Secondary A PCI X 100 MHz Open Open Closed NA S3 Selects Secondary A PCI X 66 MHz Open Open Closed NA S3 Selects Secondary A PCI 66 MHz Closed NA NA Open S3 Selects Secondary A PCI 33 MHz Closed NA NA Closed S4 Selects Secondary B PCI X 133 MHz Open Open Open NA S4 ...

Page 9: ... Data Out Not Installed J1 6 5 TDI Test Data In Not Installed J1 8 7 TMS Test Mode Select Not Installed J1 10 9 TRST Test Reset Not Installed J1 1 3 5 7 9 GND J1 11 12 NC Jumper Function J15 1 MPP CLR J15 2 VDD J15 3 GND J15 4 RB 7 dat J15 5 RB 6 Clk J15 6 nc Jumper Function Position Default J3 5 1 2 GNT4 1 Not Installed J3 5 3 4 GNT3 2 Not Installed J3 5 5 6 GNT2 3 Installed J3 5 7 8 GNT1 4 Insta...

Page 10: ...ote BOLD settings are Defaults Jumper Function Position Default J4 6 1 2 REQ4 1 Not Installed J4 6 3 4 REQ3 2 Not Installed J4 6 5 6 REQ2 3 Installed J4 6 7 8 REQ1 4 Installed J4 6 9 10 REQ0 5 Installed J7 2 4 6 8 10 GND J7 11 12 NC Function Normal Installed Test mode SMDAT J13 1 to J13 2 J13 2 to J13 3 SMCLK J14 1 to J14 2 J14 2 to J14 3 CFGRETRY J17 1 to J17 2 J17 2 to J17 3 Function Installed N...

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