Phytec phyCORE-LPC2292/94, Hardware Manual

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LAN91C111 Ethernet Controller (U501)
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PHYTEC Messtechnik GmbH 2006 L-658e_5
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9 LAN91C111 Ethernet Controller (U501)
Connection of the phyCORE-LPC2292 to the world wide web or a
local network is possible with the on-board SMSC LAN91C111
10/100 Mbps Ethernet controller populating the module at U501. This
Ethernet controller features an integrated PHY layer. Thus the external
components required to connect the phyCORE-LPC2292 to a LAN are
limited to the transformer, the RJ45 socket and a few discrete
components. The Ethernet chip is supported by a wide range of
operating systems, such as Linux etc.
U501 D0-D31
A2-A15
/CS2
DATA
ADDRESS
CONTROL
LPC229x
10/100Mbps
ETHERNET
U500
SPI_EEPROM
phyCORE-LPC229x
External
Figure 9: Ethernet Connection to LPC2292/94 Controller
The Ethernet controller is connected to the data bus with a 32-bit
width and can be configured via Jumpers J501, J502 and J503. Jumper
J501 is used to connect the interrupt signal of the LAN91C111 with a
corresponding input on the LPC2292/94 processor. The interrupt is
being used as active high edge triggered. The /CS signal for the
LAN91C111 Ethernet controller at U501 can be connected to the
LPC2292 processor's /CS2 or /CS3 signal using Jumper J502. The
Ethernet controller's offset of 0x300 has to be noted when accessing
the chip.