Phytec phyCORE-LPC2292/94, Hardware Manual

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phyCORE-LPC2292/94
12
©
PHYTEC Messtechnik GmbH 2006 L-658e_5
Table 1 provides an overview of the pinout of the phyCORE-
connector , as well as descriptions of possible alternative functions.
Please refer to the Philips phyCORE-LPC2292/94 User’s
Manual/Data Sheet for details on the functions and features of
controller signals and port pins
.
Pin Number Signal I/O Description
Pin Row X700A
1A CLKIN I Optional external clock generator (only in if
capacitor C210 is populated)
2A, 7A, 12A, 17A,
22A, 27A, 32A,
37A, 42A, 47A
GND - Ground 0 V
3A P014 I/O Port 014 of the microcontroller (see data sheet)
(alternative: external interrupt 1 input)
4A P020 I/O Port 020 of the microcontroller (see data sheet)
(alternative: external interrupt 3 input)
5A /CS0 O Chip Select #0
6A /CS2 O Chip Select #2
8A /WE O /WR signal of the microcontroller
9A, 10A, 11A,
13A, 14A, 15A,
16A, 18A,
24A, 25A,
26A, 28A
A1, A2, A4,
A7, A9, A10,
A12, A15,
A17, A18,
A20, A23 O Address line of the microcontroller
19A, 20A, 21A,
23A, 29A, 30A,
31A, 33A, 38A
39A, 40A, 41A,
43A, 44A, 45A,
46A
D1, D2, D4,
D7, D9, D10,
D12, D15, D17,
D19, D20, D22,
D25, D27, D28,
D30 I/O Data line of the microcontroller
34A /BLS0 O Low active Byte Lane Select signal (Bank0)
35A FSO I/O Freely programmable PLD signal (may be used as
additional Chip Select signal)
36A /BLS2 O Low active Byte Lane Select signal (Bank2)
48A, 49A,
50A
P03, P05,
P06 I/O
Port 0 of the microcontroller
(
see corresponding Data Sheet )