227
NO OPERATION – NOP(00)
Section 5-10
Precautions
DIFU(13) and DIFD(14) operation can be uncertain when the instructions are
programmed between IL and ILC, between JMP and JME, or in subroutines.
Refer to
5-12 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03)
,
5-
13 JUMP and JUMP END – JMP(04) and JME(05)
,
5-27 Subroutine Instruc-
tions
, and
5-28-8 INTERRUPT CONTROL – INT(89).
Example
In this example, IR 10014 will be turned ON for one cycle when IR 00000 goes
from OFF to ON. IR 10015 will be turned ON for one cycle when IR 00000
goes from ON to OFF.
5-10 NO OPERATION – NOP(00)
Description
NOP(00) is not generally required in programming and there is no ladder sym-
bol for it. When NOP(00) is found in a program, nothing is executed and the
program execution moves to the next instruction. When memory is cleared
prior to programming, NOP(00) is written at all addresses. NOP(00) can be
input through the 00 function code.
Flags
There are no flags affected by NOP(00).
5-11 END – END(01)
Description
END(01) is required as the last instruction in any program. If there are subrou-
tines, END(01) is placed after the last subroutine. No instruction written after
END(01) will be executed. END(01) can be placed anywhere in the program
to execute all instructions up to that point, as is sometimes done to debug a
program, but it must be removed to execute the remainder of the program.
If there is no END(01) in the program, no instructions will be executed and the
error message “NO END INST” will appear.
Flags
END(01) turns OFF the ER, CY, GR, EQ, LE, OF, and UF Flags.
5-12 INTERLOCK and INTERLOCK CLEAR – IL(02) and ILC(03)
Description
IL(02) is always used in conjunction with ILC(03) to create interlocks. Inter-
locks are used to enable branching in the same way as can be achieved with
TR bits, but treatment of instructions between IL(02) and ILC(03) differs from
that with TR bits when the execution condition for IL(02) is OFF. If the execu-
tion condition of IL(02) is ON, the program will be executed as written, with an
ON execution condition used to start each instruction line from the point
where IL(02) is located through the next ILC(03). Refer to
4-3-8 Branching
Instruction Lines
for basic descriptions of both methods.
DIFU(13) 10014
00000
Address Instruction
Operands
00000
LD
00000
00001
DIFU(13)
10014
00002
DIFD(14)
10015
DIFD(14) 10015
Ladder Symbol
END(01)
Ladder Symbol
IL(02)
Ladder Symbol
ILC(03)
