73
High-speed Counter Board
Section 2-1
Comparison values 1 through 48 and bit patterns 1 through 48 are registered
in the target value table. Of bits 00 to 11 of each of these bit patterns, bits 0 to
7 are stored as internal output bits, and bits 08 to 11 are stored as external
output bits. As shown in the diagram below, the bits in the external bit pattern
are used in an OR operation on the corresponding bits of high-speed counters
1 to 4, the results of which are then output as external outputs 1 to 4.
For the range comparison method, 16 comparison ranges are registered in
the comparison table. When the PV of the counter first enters between the
upper and lower limits of one of the ranges 1 to 16, the corresponding bit pat-
tern (1 to 16) will be output once to specific bits in memory.
Target value 1
Target value 2
Target value 3
Target value 4
Target value 5
Counter PV
Target value for
comparison
1
2
3
4 5
1
Bit pattern output to memory
Time
High-speed counter 1 comparison result (IR 208 or IR 240)
High-speed counter 2 comparison result (IR 209 or IR 241)
High-speed counter 3 comparison result (IR 210 or IR 242)
High-speed counter 4 comparison result (IR 211 or IR 243)
Slot 1
Slot 2
Bit
Example:
An OR is taken of the bits in
the same position and the
result is output.
External output 1 ON
External output 2 ON
External output 3 ON
External output 4 OFF
