72
High-speed Counter Board
Section 2-1
registered target values, the corresponding bit pattern (1 to 48) will be output
to specific bits in memory.
When using target values, comparison is made to each target value in the
order of the comparison table until all values have been met, and then com-
parison will return to the first value in the table. With the High-speed Counter
Board, it does not make any difference if the target value is reached as a
result of incrementing or decrementing the PV.
Note
With high-speed counter 0 in the CPU Unit or high-speed counter 1 or 2 on
the Pulse I/O Board or Absolute Encoder Interface Board, the leftmost bit of
the word containing the subroutine number in the comparison table deter-
mines if target values are valid for incrementing or for decrementing the PV.
Examples of comparison table operation and bit pattern outputs are shown in
the following diagrams.
PV of high-speed counter
Comparison
Target value (1)
When matched
Bit pattern (1)
External
output bits
Internal output
bits (8 bits)
Target value (2)
Target value (48)
Bit pattern (2)
Bit pattern (48)
208 to 211/240 to 243 Wd
An OR is taken of
corresponding bits
of IR 208 to IR 211,
or IR 240 to IR 243.
External outputs
(four outputs)
Comparison table
Target value 1
Target value 2
Target value 3
Target value 4
Target value 5
Target value 5
Target value 4
Target value 3
Target value 2
Target value 1
Counter PV
Target value for
comparison
1
2
3
4
5
1
2
Bit pattern output to memory
Time
