185
Basic Ladder Diagrams
Section 4-3
OR and OR NOT
When two or more conditions lie on separate instruction lines running in paral-
lel and then joining together, the first condition corresponds to a LOAD or
LOAD NOT instruction; the rest of the conditions correspond to OR or OR
NOT instructions. The following example shows three conditions which corre-
spond in order from the top to a LOAD NOT, an OR NOT, and an OR instruc-
tion. Again, each of these instructions requires one line of mnemonic code.
The instruction would have an ON execution condition when any one of the
three conditions was ON, i.e., when IR 00000 was OFF, when IR 00100 was
OFF, or when LR 0000 was ON.
OR and OR NOT instructions can be considered individually, each taking the
logical OR between its execution condition and the status of the OR instruc-
tion’s operand bit. If either one of these were ON, an ON execution condition
would be produced for the next instruction.
Combining AND and OR
Instructions
When AND and OR instructions are combined in more complicated diagrams,
they can sometimes be considered individually, with each instruction perform-
ing a logic operation on the execution condition and the status of the operand
bit. The following is one example. Study this example until you are convinced
that the mnemonic code follows the same logic flow as the ladder diagram.
Here, an AND is taken between the status of IR 00000 and that of IR 00001 to
determine the execution condition for an OR with the status of IR 00200. The
result of this operation determines the execution condition for an AND with the
status of IR 00002, which in turn determines the execution condition for an
AND with the inverse (i.e., and AND NOT) of the status of IR 00003.
In more complicated diagrams, however, it is necessary to consider logic
blocks before an execution condition can be determined for the final instruc-
tion, and that’s where AND LOAD and OR LOAD instructions are used. Before
we consider more complicated diagrams, however, we’ll look at the instruc-
tions required to complete a simple “input-output” program.
Instruction
00100
LR 0000
00000
Address
Instruction
Operands
00000 LD NOT
00001 OR NOT
00002 OR LR
00003 Instruction
00000
00100
0000
Instruction
00002
00003
00000
00001
00200
Address Instruction
Operands
00000 LD
00001 AND
00002 OR
00003 AND
00004 AND NOT
00005 Instruction
00000
00001
00200
00002
00003
