249
Timer and Counter Instructions
Section 5-16
The port specifier (P) specifies which one of the High-speed Counter Board’s
high-speed counters will be used in the comparison.
The function of CTBL(63) is determined by the control data, C, as shown in
the following table. These functions are described after the table.
When the PV agrees with a target value or falls within a specified range, a bit
pattern is output to the allocated IR word. Refer to
1-4-6 High-speed Counter
0 Interrupts
for more details on table comparison.
If the high-speed counter is enabled in the PC Setup (DM 6642), it will begin
counting from zero when the CQM1H begins operation. The PV will not be
compared to the comparison table until the table is registered and comparison
is initiated with INI(61) or CTBL(63). Comparison can be stopped and started,
or the PV can be reset with INI(61).
Once a comparison table has been registered, it is valid until the CQM1H is
halted or until a error occurs in attempting to register a new table. The differ-
entiated form of CTBL(63) is recommended when possible to reduce cycle
time.
Target Value Comparison
Up to 48 target values can be registered. A bit pattern is also registered for
each target value. The registered bit pattern is output to the allocated IR word
when the PV matches a target value. The High-speed Counter Board does
not generate interrupts; the registered bit pattern is reflected in the allocated
IR word and at the external outputs.
Function
Port specifier (P)
For a Board in slot 1
For a Board in slot 2
High-speed counter 1 101
001
High-speed counter 2 102
002
High-speed counter 3 103
003
High-speed counter 4 104
004
C
CTBL(63) function
000
Registers a target value comparison table and starts comparison.
001
Registers a range comparison table and starts comparison.
002
Registers a target value comparison table. Start comparison with INI(61).
003
Registers a range comparison table. Start comparison with INI(61).
High-speed counter PV
Match
Target value 1
Compare
Target value 2
Target value 48
Bit pattern 1
Bit pattern 2
Bit pattern 48
11
0
(see note)
(see note)
(see note)
