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Bit Control Instructions
Section 5-9
Precautions
The status of operand bits for SET and RSET programmed between IL(02)
and ILC(03), or JMP(04) and JME(05), will not change when the interlock or
jump condition is met (i.e., when IL(02) or JMP(04) is executed with an OFF
execution condition).
Flags
There are no flags affected by these instructions.
Examples
The following examples demonstrate the difference between OUT and SET/
RSET. In the first example (Diagram A), IR 10000 will be turned ON or OFF
whenever IR 00000 goes ON or OFF.
In the second example (Diagram B), IR 10000 will be turned ON when IR
00001 goes ON and will remain ON (even if IR 00001 goes OFF) until IR
00002 goes ON.
5-9-3
KEEP – KEEP(11)
Limitations
Any output bit can generally be used in only one instruction that controls its
status.
Description
KEEP(11) is used to maintain the status of the designated bit based on two
execution conditions. These execution conditions are labeled S and R. S is
the set input; R, the reset input. KEEP(11) operates like a latching relay that is
set by S and reset by R.
When S turns ON, the designated bit will go ON and stay ON until reset,
regardless of whether S stays ON or goes OFF. When R turns ON, the desig-
nated bit will go OFF and stay OFF until reset, regardless of whether R stays
ON or goes OFF. The relationship between execution conditions and
KEEP(11) bit status is shown below.
Flags
There are no flags affected by this instruction.
00000
Diagram A
00002
RSET 10000
Diagram B
SET 10000
00001
Address Instruction
Operands
00000
LD
00000
00001
OUT
10000
Address Instruction
Operands
00000
LD
00001
00001
SET
10000
00002
LD
00002
00003
RSET
10000
10000
B
:
Bit
IR, SR, AR, HR, LR
Ladder Symbol
Operand Data Areas
S
R
KEEP(11)
B
S execution condition
R execution condition
Status of B
