MPC555 / MPC556
INDEX
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
Index-6
LE bit
Least significant bit (LSB)
Left justified
signed result word table (LJSRR)
unsigned result word table (LJURR)
Length of delay after transfer (DTL)
Link register
Little endian mode
LJSRR
LJURR
Load/store unit
Lock
/release/busy mechanism
Loop
mode
(LOOPS)
LOOPQ
LOOPS
Low power stop (LPSTOP)
QADC
QSM
Lowest buffer transmitted first (LBUF)
Low-power
stop mode enable (STOP)
QADC
TPU
LR
LSB
LSU
LW0EN
LW0IA
LW0IADC
LW0LA
LW0LADC
LW0LD
LW0LDDC
LW1EN
LW1IA
LW1IADC
LW1LA
LW1LADC
LW1LD
LW1LDDC
–M–
M
Machine
check enable
state register
status save/restore register 0
status save/restore register 1
machine check interrupt,
Machine status save/restore register 1
Mask
examples for normal/extended messages
registers (RX)
Master
/slave mode select (MSTR)
master
external
arbitration phase,
MCE
MCEE
MCPWM
ME bit
Message
buffer
address map
code for RX/TX buffers
deactivation
structure
format error (FORMERR)
Mid-analog supply voltage
MISO
Mode
fault flag (MODF)
select (M)
Mode Fault Flag (MODF)
Modes
disabled
reserved
scan. See Scan modes
MODF
Modulus
counter
MOSI
Most significant bit (MSB)
MQ1
MQ2
MSB
MSR
,
MSR,
MSTR
Multichannel pulse-width modulation (MCPWM)
parameters
slave channel A
non-inverted center aligned mode
,
slave edge-aligned mode
Multimaster operation
Multiphase motor commutation (COMM)
parameters
Multiple end-of-queue
Multiplexed analog inputs
MUX
–N–
New
queue pointer value (NEWQP)
New input capture/transistion counter (NITC)
parameters
NEWQP
NF
NI bit
NITC
Noise
error flag (NF)
errors
flag (NF)
Non-IEEE 1149.1-1990 operation
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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