MPC555
/
MPC556
SIGNAL DESCRIPTIONS
MOTOROLA
USER’S MANUAL
Rev. 15 October 2000
2-24
Visible History Buffer Flush Status –
These signals are output by the chip to allow
program instruction flow tracking. They report the number of instructions flushed from
the history buffer in the RCPU. See
SECTION 21 DEVELOPMENT SUPPORT
for de-
tails.
MIOS GPIO –
This function allows the pins to be used as general purpose inputs/out-
puts.
2.3.3.7 MPIO32B[5:15]
Pin Name
: mpio32b5 - mpio32b15 (11 pins)
MIOS GPIO –
This function allows the pins to be used as general purpose inputs/out-
puts.
2.3.4 TPU_A/TPU_B PADS
2.3.4.1 TPUCH[0:15]_[A:B]
Pin Name
: a_tpuch0 - a_tpuch15 (16 pins for first TPU), b_tpuch0 - b_tpuch15 (16
pins for second TPU)
TPU Channels –
These signals provide each TPU with 16 input/output programmable
timed events.
2.3.4.2 T2CLK
Pin Name:
a_t2clk (1 pin for first TPU), b_t2clk (1 pin for second TPU)
T2CLK –
This signal is used to clock or gate the timer count register 2 (TCR2) within
the TPU. This pin is an output-only in special test mode.
2.3.5 QADC_A/QADC_B PADS
2.3.5.1 ETRIG[1:2]
Pin Name
: etrig1 - etrig2
ETRIG –
These are the external trigger inputs to the QADC_A and QADC_B modules.
ETRIG[1] can be configured to be used by both QADC_A and QADC_B. Likewise,
ETRIG[2] can be used for both QADC_B and QADC_A. The trigger input pins are as-
sociated with the scan queues.
2.3.5.2 AN[0]/ANW/PQB[0]_[A:B]
Pin Name
: a_an0_anw_pqb0 (1 pin for first QADC), b_an0_anw_pqb0 (1 pin for sec-
ond QADC)
Analog Channel (AN0) –
Internally multiplexed input-only analog channels. Passed
on as a separate signal to the QADC.
Multiplexed Analog Input (ANW) –
Externally multiplexed analog input.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
.
..