5. SEQUENCE INSTRUCTIONS
5
−
28
MELSEC-A
5.4 Shift Instructions
5.4.1 Bit device shift (SFT, SFTP)
Available Device
Bit device
Word (16-bit) device
Constant
Pointer
Level
Ca
rr
y
fla
g
Err
o
r
fla
g
X Y M L S B F T C D W R A0
A1
Z V K H P I N
D
igit specification
Inde
x
M9012 (M9010, M9011)
(D)
O
O
O
O
O
O
*1: Index qualification can be used with AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
Functions
(1) This instruction shifts the ON/OFF status of a device number, (defined as D-1)
to the device specified as D and turns off the device with the lower number.
(2) Turn on the head device to be shifted with the SET instruction.
(3) When the SFT or SFTP instruction is used consecutively, program higher device
numbers first. (See below.)
Setting data
*1
Applicable
CPU
All CPUs
SFT
SFTP
(D)
(D)
SFT instruction
1)
2)
3)
4)
5)
6)
7)
After the second shift input
X2 ON
After the first shift input
X2 ON
After the third shift input
After the fourth shift input
After the fifth shift input
Shift range
*: At M8 to 15, 1 indicates ON and 0 indicates OFF.
Shift input
M0
X002
P
SFT M14
P
SFT
M13
P
SFT
M12
P
SFT
M11
SFT
M10
(D)
Device number to be
shifted
Summary of Contents for MELSEC-A series
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