Mitsubishi MELSEC-A series Programming Manual Download Page 99 | Manualshive

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5. SEQUENCE INSTRUCTIONS

5

−

30

MELSEC-A

5.5 Master Control Instructions

5.5.1 Master control set, reset (MC, MCR)

Available Device

Bit device

Word (16-bit) device

Constant

Pointer

Level

Ca

rr

y

fla

g

Err

o

r

fla

g

X Y M L S B F T C D W R A0

A1

Z V K H P I N

D

igit specification

Inde

x

M9012 (M9010, M9011)

n

O

(D)

O

O

O

O

O

O

*1: Index qualification can be used with AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.

Functions

The MC instruction is used to allow the sequence program to perform efficient circuit

switching by opening and closing the common bus of circuits. The figure below

shows an example of circuit when the MC instruction is used.

REMARK

When a program is written in the ladder mode of GPP, it is not necessary to input contacts on the
bus. Those contacts are displayed automatically by performing conversion.

*1

Applicable

CPU

All CPUs

ON/OFF command for MC

MC

MCR

n

n

(D)

n

Nesting (N0 to 7)

(D)

Device number to be
turned on

Setting data

(D)

←

Device

Nesting (N0 to 7)

n

(

)

(

)

(

)

Circuit in the ladder mode of GPP

Actual operation circuit

Executed
only when
X0 is ON.

X000

N1 M0

MC N1 M0

Y047

Y04F

X001 X003 M7

M5

X006 X004

MCR N1

Y010

X00F

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Summary of Contents for MELSEC-A series

Page 1: ......

Page 2: ......

Page 3: ...this manual it is also essential to pay due attention to safety and handle the product correctly The safety cautions given here apply to this product in isolation For information on the safety of the...

Page 4: ...e of the PRODUCT in Nuclear Power Plants and any other power plants operated by Power companies and or any other cases in which the public could be affected if any problem or fault occurs in the PRODU...

Page 5: ...R21 F A2NCPU P21 R21 S1 F A3NCPU P21 R21 F A373CPU P21 R21 Jan 2000 IB NA 66250 D Addition of Models Q02CPU A Q02HCPU A Q06HCPU A A2USHCPU S1 A2USH board Addition Section 9 5 APP 2 3 Correction Secti...

Page 6: ...A 66250 I Correction Section 3 5 3 8 1 5 3 1 6 4 3 7 1 1 7 1 2 7 1 3 7 1 4 7 3 1 7 4 1 7 4 6 7 6 1 7 6 2 7 6 3 7 6 4 7 6 5 7 6 6 7 8 2 9 1 9 2 9 3 9 4 9 5 9 6 APP 1 1 APP 1 2 APP 1 3 APP 1 4 Addition...

Page 7: ...for choosing the Mitsubishi MELSEC A Series of General Purpose Programmable Controllers Please read this manual carefully so that the equipment is used to its optimum A copy of this manual should be...

Page 8: ...ns on Using AnA A2AS AnU QCPU A A Mode and A2USH board 3 14 3 8 1 The number of steps used in instructions 3 14 3 8 2 Instructions of variable functions 3 16 3 8 3 Set values for the extension timer a...

Page 9: ...ion subtraction P P 6 10 6 2 2 BIN 32 bit addition subtraction D D P D D P 6 13 6 2 3 BIN 16 bit multiplication division P P 6 16 6 2 4 BIN 32 bit multiplication division D D P D D P 6 19 6 2 5 BCD 4...

Page 10: ...lement NEG NEGP 7 20 7 2 Rotation Instructions 7 22 7 2 1 16 bit data right rotation ROR RORP RCR PCRP 7 23 7 2 2 16 bit data left rotation ROL ROLR RCL RCLP 7 25 7 2 3 32 bit data right rotation DROR...

Page 11: ...ns PR PRC 7 106 7 9 2 ASCII code comment display instructions LED LEDC 7 113 7 9 3 Character display instructions LEDA LEDB 7 116 7 9 4 Annunciator reset instruction LEDR 7 118 7 10 Other Instructions...

Page 12: ...1 APP 100 APPENDIX 1 LISTS OF SPECIAL RELAYS AND SPECIAL REGISTERS APP 1 Appendix 1 1 List of Special Relays APP 1 Appendix 1 2 Special Relays for Link APP 13 Appendix 1 3 Special Registers APP 16 Ap...

Page 13: ...A 11 MEMO...

Page 14: ...for the purpose it is not necessary to set the parameter The user s programs for the MELSEC A series PCs are classified as follows ACPU Programming Manual fundamental gives the programs which can be u...

Page 15: ...AnSH A2SH A2SHCPU A2SHCPU S1 A2C A2CCPU P21 R21 A2CCPUDC24 A2CCPUC24 PRF A2CCPU S3 A3N board A7BDE A3N PT32 S3 A2USH board Type A80BDE A2USH S1 PLC CPU Board A73 A73CPU P21 R21 A52G A52GCPU T21B A2U...

Page 16: ...ming procedures Description of devices and parameters Kinds of programs Configuration of memory areas ACPU programming Manual Fundamentals IB NA 66249 Description of dedicated instructions extended ap...

Page 17: ...n Transfer of specified data 6 46 to 6 57 Program branch instruction Program jump subroutine interrupt program call 6 58 to 6 69 Program switching instruction Switching between main and subprogram 6 7...

Page 18: ...ndex Subset Applicable CPU Page 5 6 10 P D S D 5 6 10 7 6 10 P S1 S2 D 7 6 10 5 6 10 P D S D 5 6 10 7 6 10 BIN 16 bit addition subtrac tion 16 bits P S1 S2 D 7 6 10 Explanation 1 Classifies the instru...

Page 19: ...ion of data after operation Source Stores data before operation 5 Indicates the processing of each instruction 32 bit instruction D is added to the head of instruction D Example 16 bit instruction 32...

Page 20: ...to off Thereafter even is the condition is off that instruction is not executed and not processed 7 Indicates the number of steps of each instruction The number of steps which change depending on con...

Page 21: ...Instruction Symbol Symbol Contents of Processing Execu tion Con dition Number of steps Index Subset Applicable CPU Page ANB ANDs logical blocks Series connection of blocks 1 5 5 ORB Ors logical blocks...

Page 22: ...ns Classi fication Unit Instruction Symbol Symbol Contents of Processing Execu tion Con dition Number of steps Index Subset Applicable CPU Page SFT 3 5 28 Shift SFTP Shifts device 1 bit 3 5 28 5 Maste...

Page 23: ...er of steps Index Subset Applicable CPU Page Stop STOP Resets output after the input condition is enabled and stops the sequence program The sequence program is resumed by setting the RUN key switch t...

Page 24: ...D 7 6 4 5 OR Continuity when S1 S2 Non continuity when S1 S2 7 6 4 5 LD 7 6 4 5 AND 7 6 4 5 OR Continuity when S1 S2 Non continuity when S1 S2 7 6 4 5 LD 7 6 4 5 AND 7 6 4 5 16 bit data com parison 16...

Page 25: ...1 S1 S2 1 S2 Non continuity when S1 1 S1 S2 1 S2 11 6 6 LDD 11 6 6 ANDD 11 6 6 ORD Continuity when S1 1 S1 S2 1 S2 Non continuity when S1 1 S1 S2 1 S2 11 6 6 LDD 11 6 6 ANDD 11 6 6 32 bit data com pa...

Page 26: ...1 S D 1 D 9 6 13 D 11 6 13 BIN 32bit addition subtrac tion 32 bits D P S1 1 S1 S2 1 S2 D 1 D 11 6 13 7 6 16 P S1 S2 D 1 D 7 6 16 7 6 16 BIN 16bit multipli cation division 16 bits P S1 S2 Quotient D R...

Page 27: ...B 9 6 25 DB P D 1 D S 1 S D 1 D 9 6 25 DB 11 6 25 BCD 8 digit addition subtrac tion BCD 8 digits DB P S1 1 S1 S2 1 S2 D 1 D 11 6 25 DB 9 6 25 DB P D 1 D S 1 S D 1 D 9 6 25 DB 11 6 25 BCD 8 digit addit...

Page 28: ...r D 3 D 2 11 6 31 INC 3 6 34 16 bits INCP D 1 D 3 6 34 DINC 3 6 36 BIN data incre ment 32 bits DINCP D 1 D 1 D 1 D 3 6 36 DEC 3 6 34 16 bits DECP D 1 D 3 6 34 DDEC 3 6 36 BIN data decre ment 32 bits D...

Page 29: ...tructions Continue Classi fication Unit Instruction Symbol Symbol Contents of Processing Execu tion Con dition Number of steps Index Subset Applicable CPU Page MOV 5 6 47 16 bits MOVP S D 5 6 47 DMOV...

Page 30: ...the subroutine program to the sequence program 1 6 62 EI Enables interrupt program run Valid for AnN with M9053 off 1 Not applicable to A3V A2C and A52G 6 65 DI Disables interrupt program run Valid fo...

Page 31: ...M9053 is on 1 Not applicable to An A3H A3M A3V AnA A2AS AnU QCPU A A Mode and A2USH board 6 85 Link refresh enable disable DI Disables link refresh Valid when M9053 is on 1 Not applicable to An A3H A...

Page 32: ...OR 9 7 8 Logical sum 32 bits DORP D 1 D OR S 1 S D 1 D 9 7 8 WXOR 5 7 12 WXORP D XOR S D 5 7 12 WXOR 7 7 12 16 bits WXORP S1 XOR S2 D 7 7 12 DXOR 9 7 12 Exclu sive logical sum 32 bits DXORP D 1 D XOR...

Page 33: ...D 1 D XOR S 1 S D 1 D 9 7 16 NEG 3 7 20 2 s comple ment 16 bits NEGP 0 D D 3 7 20 1 For the number of steps when extension devices are used or when index qualification is performed to bit devices for...

Page 34: ...it rotation to right 3 7 27 DRCR 3 7 27 Right ward rotation DRCRP A1 A0 0 15 Carry 0 15 n bit rotation to right 3 7 27 DROL 3 7 29 DROLP A1 A0 0 15 Carry 0 15 n bit rotation to left 3 7 29 DRCL 3 7 29...

Page 35: ...Not applicable to A73 7 37 DSFL 7 Not applicable to A73 7 37 1 ward shift n ward DSFLP 7 Not applicable to A73 7 37 1 For the number of steps when extension devices are used or when index qualificatio...

Page 36: ...NIP 9 7 54 ASCII conver sion ASC Converts alphanumeric characters into ASCII codes and stores into 4 points beginning with the devices D 13 7 57 1 For the number of steps when extension devices are us...

Page 37: ...A2C and A52G 7 65 TO 9 Not applicable to A2C and A52G 7 68 1 word TOP 9 Not applicable to A2C and A52G 7 68 DTO 11 Not applicable to A2C and A52G 7 68 Date write 2 words DTOP Writes data to the specia...

Page 38: ...ructions Classi fication Unit Instruction Symbol Symbol Contents of Processing Execu tion Con dition Number of steps Index Subset Applicable CPU Page LRDP Reads data from the local station 11 7 91 Loc...

Page 39: ...Symbol Contents of Processing Execu tion Con dition Number of steps Index Subset Applicable CPU Page WDT 1 7 122 WDT reset WDTP WDT is reset in sequence program 1 7 122 Failure check CHK Failure D1 O...

Page 40: ...f stopping axes and also changes axis feedrate during positioning and jog operation 7 Dedicated to A73 7 144 1 For the number of steps when extension devices are used or when index qualification is pe...

Page 41: ...device Switches the device on off controls the execution condition in accordance with the device status branches the program etc c Instruction part Source device Destination device Operation is perfor...

Page 42: ...to the specified device before the operation is initiated By changing the data to be stored to the specified device during program run the data used with the instruction can be changed 2 Destination...

Page 43: ...ecified in 4 point increments when a 16 bit instruction is used and up to 32 points can be specified when a 32 bit instruction is used 1 16 bit instruction K1 to 4 4 to 16 points Example Setting range...

Page 44: ...o 32 points Example Setting range by the digit specification of 32 bit data X0 to 1F Fig 3 4 Digit Specification Range of 32 Bit Instruction Specification range of K1 4 points Specification range of K...

Page 45: ...268435455 K4 16 points 0 to 65535 K8 32 points 2147483648 to 2147483647 Ladder Example Processing 32 bit instruction Fig 3 5 Ladder Example and Processing 4 When there is digit specification on the de...

Page 46: ...lows POINTS 1 Numeric value setting procedure a Decimal b Hexadecimal 2 When FFFEH is divided by 2 the following occurs 16 bits 32768 to 32767 32 bits 2147483648 to 2147483647 10 is stored D10 in BIN...

Page 47: ...low 8003H 8002H 8001H 8000H 7FFFH 7FFEH 7FFDH 7FFCH 80000003H 80000002H 80000001H 80000000H 7FFFFFFFH 7FFFFFFEH 7FFFFFFDH 7FFFFFFCH Even in the case of overflow and underflow the carry flag and error...

Page 48: ...store 32 bit data b To store the data of bit devices with which digit specification of K1 to K8 was done in word devices with 32 bit instructions refer to Section 3 2 2 1 c Cautions 1 Even if the stor...

Page 49: ...handle 32 bit data with extension index registers Z1 to Z6 and V1 to V6 of AnA A2AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 5 3 If one of two consecutive word devices used to store 32...

Page 50: ...own below Example When the index qualification is performed the actual processing devices are as shown below Z 20 V 5 Ladder Example Actual Processing Device X010 MOV H FFFF Z X011 MOV Z D10 D0 FFFH 1...

Page 51: ...corresponding device range Index Circuit Example Judgement Z 15 Although K4B3FF B 3F0 F B3FF is specified operation error does not occur Z 16 Since K4B400 B 3F0 10 B400 is specified and the correspon...

Page 52: ...devices Digit specification must be K4 16 bit processing or K8 32 bit processing The bit device specified must be a multiple of 16 File register R and index registers Z and V must not be used 3 7 Ope...

Page 53: ...ration error has occurred sequence processing may be stopped or continued as selected by the parameter setting For details refer to the ACPU Programming Manual Fundamentals Error flag M9010 Turned on...

Page 54: ...A Mode A2USH board I O X Y 800 to 1FFF Internal relay M L S 2048 to 8191 Timer T 256 to 2047 Counter C 400 to FFF 400 to 1FFF Link relay B 1024 to 6143 1024 to 8191 Data register D 400 to FFF 400 to 1...

Page 55: ...registers Z1 to Z6 V1 to V6 extended by AnA A2AS AnU QCPU A A Mode and A2USH board the number of steps increases only one Example LD X0 1 step OUT Y40 1 step Total 2 steps LD X0Z 1 1 2 steps OUT Y40 1...

Page 56: ...ion module Device memory access MELSECNET MINI S3 support instruction LEDA LEDB Unusable Dedicated instruction start LEDC LED comment display Device specification DXNR NOT exclusive logical sum operat...

Page 57: ...256 to 2047 Counter C 256 to 1023 Example When the set value device for T256 is specified at D370 with parameters 3 8 4 Cautions on using index qualification 1 Check device numbers when index qualifi...

Page 58: ...on is established Example 1 When M1 M2 and M4 are ON and M3 is OFF in the circuit shown below M1Z 3 SET F1Z F1Z Number of scans Device No ON OFF state Execution condition Execution no execution state...

Page 59: ...ion F2 OFF 3rd M3 OFF ON OFF not established No execution F3 OFF 4th M4 ON OFF ON established Execution F4 ON REMARKS 1 1 Execution no execution is determined by comparing the device states between th...

Page 60: ...sed in pairs to store 32 bit data 1 Z1 and V1 2 Z2 and V2 3 Z3 and V3 4 Z4 and V4 5 Z5 and V5 6 Z6 and V6 Any pairs other than those mentioned above cannot store 32 bit data If one of paired devices i...

Page 61: ...results up until the time the OUT command was executed and this is done for each OUT instruction that is executed Since the specified device is turned On or Off when each OUT instruction is executed i...

Page 62: ...ted multiple times in 1 scan from the same device if even one RST command goes On the specified device goes Off c If there is a SET instruction and a RST instruction from the same device in 1 scan the...

Page 63: ...goes from Off to Off and the specified device goes Off when the PLS command is other than Off On For this reason if the PLS command from the same device is executed multiple times in 1 scan the device...

Page 64: ...nstruction turns the specified device On when the PLF command goes from On to Off and when the PLF command is not going from Off to On Off Off Off On On On the specified device goes Off If the PLF ins...

Page 65: ...the Off state M0 goes Off because X1 is not On Off M0 remains in the Off state M0 goes On because X0 is On Off M0 goes Off because X1 is not On Off When the On Off of X0 and X1 are the same timing M0...

Page 66: ...bol Shift commands D n D n P Digit specification Functions DSFR 1 Shifts the word devices of n points which begin with the device specified at D to the right by one bit 2 The highest bit changes to 0...

Page 67: ...n XB turns on Coding 0 LD XB 1 DSFRP D683 K7 8 END Before execution After execution Specification range of DSFRP instruction DSFL Program which shifts the contents of D683 to 689 to the left when XB t...

Page 68: ...specification 6 A circle O is given to the instruction which can use index qualification Z or V is added A triangle is given to the instruction which can use index qualification with some specific typ...

Page 69: ...y in list mode is as follows For the input procedure of the program refer to the Operating Manual of respective peripheral device 0 LD M9036 1 DBIN K6X020 D9 10 D D9 K10000 D5 21 BIN K4X010 D3 26 MOV...

Page 70: ...ction parallel connection 5 2 Connection instruction Ladder block series connection parallel connection operation result storage 5 5 Output instruction Bit device output differential output set reset...

Page 71: ...ntact B operation start instruction They draw the ON OFF data of the specified device and use the data as an operation result AND ANI 1 AND is the NO contact series connection instruction and ANI is t...

Page 72: ...ce performs the OR operation of that data and the previous operation result and use it as a new operation result 2 There are no restrictions on the use of OR and ORI However the following conditions a...

Page 73: ...Y034 8 END X003 X004 X005 X005 X006 M11 Y033 Y034 0 4 Coding 0 LD X003 1 AND M6 2 LDI X004 3 ANI X007 4 ORB 5 ANI M9 6 OUT Y033 7 LD X005 8 LD M8 9 OR M9 10 ANB 11 ANI M11 12 OUT Y034 13 END X003 X00...

Page 74: ...block A and Block B and uses it as an operation result 2 The symbol of ANB is not a contact symbol but a connection symbol 3 ANB can be written consecutively up to the number of instructions mentioned...

Page 75: ...ot required See below 3 The symbol of ORB is not a contact symbol but a connection symbol 4 ORB can be written consecutively up to the number of instructions mentioned below For AnA A2AS AnU QCPU A A...

Page 76: ...7 ANB 8 LD X006 9 OR X007 10 ANB 11 LD X008 12 OR X009 13 ANB 14 OUT M7 15 END Coding example 2 0 LD X000 1 OR X001 2 LD X002 3 OR X003 4 LD X004 5 OR X005 6 LD X006 7 OR X007 8 LD X008 9 OR X009 10 A...

Page 77: ...X004 6 AND X005 7 ORB 8 LD X006 9 AND X007 10 ORB 11 OUT M7 12 END Coding example 2 0 LD X000 1 AND X001 2 LD X002 3 AND X003 4 LD X004 5 AND X005 6 LD X006 7 AND X007 8 ORB 9 ORB 10 ORB 11 OUT M7 12...

Page 78: ...ion can be used up to the number of times mentioned below For AnA A2AS AnU QCPU A A Mode and A2USH board 16 times For CPUs other than AnA A2AS AnU QCPU A A Mode and A2USH board 12 times However it can...

Page 79: ...g at the next step 2 Clears the operation result stored by the MPS instruction POINT 1 When MPS MRD and MPP are used and when they are not used the circuits differ as shown below Circuit Using MPS MRD...

Page 80: ...ge 2 If the number of MPP instructions is larger than that of MPS instructions this results in circuit plotting error and the PC cannot perform proper operation Coding 0 LD X000 1 AND X001 2 MPS 3 AND...

Page 81: ...1D 7 MPS 8 AND M9 9 MPS 10 AND M68 11 OUT Y032 12 MPP 13 AND T0 14 OUT Y033 15 MPP 16 OUT Y034 17 LD X01E 18 AND M81 19 MPS 20 AND M96 21 OUT Y035 22 MRD 23 AND M97 24 OUT Y036 25 MRD 26 AND M98 27 OU...

Page 82: ...9 X008 X00A CIRCUIT END 0 LD X000 1 MPS 2 AND X001 3 MPS 4 AND X002 5 MPS 6 AND X003 7 MPS 8 AND X004 9 MPS 10 AND X005 11 MPS 12 AND X006 13 MPS 14 AND X007 15 MPS 16 AND X008 17 MPS 18 AND X009 19 M...

Page 83: ...AS AnU QCPU A A Mode and A2USH board refer to Section 3 8 3 Functions OUT Y M L S B F 1 This instruction outputs the operation result for the elements pereceding the OUT instruction OUT Instruction Co...

Page 84: ...to the display of LED indicators To avoid this use the SET instruction to turn ON the annunciator If the OUT instruction is used to turn ON the annunciator the annunciator coil turns OFF when the ope...

Page 85: ...used with the AnA A2AS AnU QCPU A A Mode and A2USH board specify set values as described in Section 3 8 3 5 A negative number 32768 to 1 cannot be set as a set value 6 When a set value is 0 it is reg...

Page 86: ...utput at the output unit 2 Program which turns on Y10 and Y14 10 seconds after X0 turns on 3 Program which uses the BCD data of X10 to 1F as the set value of the timer Coding 0 LD X005 1 OUT Y033 2 LD...

Page 87: ...0 C10 K10 C10 Y030 RST C10 Coding 0 LD X000 1 OUT C10 K10 2 LD C10 3 OUT Y030 4 LD X001 5 RST C10 8 END When X1 turns on 20 is stored to D0 When X0 turns on 10 is stored to D0 0 6 12 14 C10 X000 X001...

Page 88: ...on 2 The turned on device remains on even if the SET input turns off The device can be turned off by the RST instruction 3 When the SET input is off the status of the device does not change RST 1 Whe...

Page 89: ...esh mode the SET RST instructions cannot be used in a program which outputs a pulse signal during one scan In this case output Y must be changed to direct mode or add the partial refresh command as sh...

Page 90: ...ets the content of data register to 0 Coding 0 LD X000 1 MOV K4X010 D8 6 LD X005 7 RST D8 10 END When X0 turns on the contents of X10 to 1F are stored into D8 When X5 turns on the content of D8 is set...

Page 91: ...5 3 OUT C23 K16 4 RST T225 7 LD C23 8 OUT Y055 9 LD X005 10 RST C23 13 END T225 turns on after X4 has been on for 30 minutes The number of ON times of T225 is counted When T225 has turned on T225 is r...

Page 92: ...S command changes from Off to On the specified device goes On for 1 scan and when the PLS command is in a state other than Off On Off Off On On On Off the device goes Off If there is one PLS instructi...

Page 93: ...If the instruction generating the pulse is off and the RUN key switch is moved from the RUN to STOP position and then returned to the RUN position again the PLF instruction is not executed X000 PLS M...

Page 94: ...CALL instruction the device specified by D will go On for 1 scan or longer so exercise caution Program Examples PLS Program which executes the PLS instruction when M9 turns on PLF Program which execut...

Page 95: ...efer to Section 7 10 2 Available Device Bit device Word 16 bit device Constant Pointer Level Carry flag Error flag X Y M L S B F T C D W R A0 A1 Z V K H P I N Digit specification Index M9012 M9010 M90...

Page 96: ...with K1 to K4 Specify any value since this digit specification value is a dummy data Device specified for D2 can be used freely for other purposes 3 The CHK instruction is only executed in refresh mod...

Page 97: ...fined as D 1 to the device specified as D and turns off the device with the lower number 2 Turn on the head device to be shifted with the SET instruction 3 When the SFT or SFTP instruction is used con...

Page 98: ...OFF OFF OFF OFF ON ON ON ON ON ON Coding 0 LD X008 1 SFTP Y05B 4 STFP Y05A 7 SFTP Y059 10 SFTP Y058 13 LD X007 14 PLS M8 17 LD M8 18 SET Y057 19 END X008 0 P SFT Y05B P SFT Y05A P SFT Y059 P SFT Y058...

Page 99: ...ram to perform efficient circuit switching by opening and closing the common bus of circuits The figure below shows an example of circuit when the MC instruction is used REMARK When a program is writt...

Page 100: ...uction immediately before it FOR to NEXT EI DI etc is contained in the circuit in which the MC instruction is used the PC executes the instruction regardless of the status of the ON OFF command for th...

Page 101: ...esting numbers N and MCR with higher numbers If the nesting numbers are used reverse nesting is not configured and the PC does not operate correctly Ladder as displayed in the GPP ladder mode Ladder a...

Page 102: ...structions gather at one place of nesting use the lowest nesting number N once to end all MCs X001 N0 M15 MC N0 M15 X002 N1 M16 MC N1 M16 X003 N2 M17 MC N2 M17 MCR N2 MCR N1 MCR N0 X001 N0 M15 MC N0 M...

Page 103: ...ocated after FEND instruction can also be displayed on the GPP The GPP displays a circuit up to the END instruction Operation Errors In the following cases operation error occurs and the PC stops its...

Page 104: ...is on jump is made to label P23 and execution is performed from the next step to P23 Y030 X014 8 Y031 Executed when XB is off 10 FEND X001 P23 11 Indicates the end of sequence program when XB is off...

Page 105: ...ates the end of program At this step the scan returns to step 0 2 The END instruction cannot be used midway through the sequence program or subsequence program If END processing is necessary halfway t...

Page 106: ...in the subprogram Operation Errors In the following cases operation error occurs and the PC stops its operation 1 Jump has been made to a step below the END instruction by the CJ SCJ or JMP instructi...

Page 107: ...of the special register D9015 is set to 1 3 To resume the operation of PC after the execution of STOP instruction move the RUN key switch from the RUN to the STOP position and then move it to the RUN...

Page 108: ...LSEC A Program Examples STOP 1 Program which stops the PC when X8 turns on X008 X00A X00B STOP Y013 Y023 0 2 4 When X8 turns on PC is stopped Sequence program Coding 0 LD X008 1 STOP 2 LD X00A 3 OUT Y...

Page 109: ...rovide space for debugging of sequence programs 2 To delete an instruction without changing the number of steps Overwrite with NOP 3 To delete an instruction temporarily NOPLF 1 This is a no operation...

Page 110: ...LD AND ANI OUT END 0 1 2 3 4 X008 Y097 Y096 Y012 0 X008 Y012 Y096 LD NOP ANI OUT END 0 1 2 3 4 X008 Y096 Y012 Before change After change Coding Coding 2 Short of contact LD LDI If LD or LDI is change...

Page 111: ...MELSEC A Before change After change 0 X000 Y016 2 X056 Y066 T3 0 X0 Y16 3 T3 Y66 LD OUT LD AND OUT END 0 1 2 3 4 5 X0 Y16 X56 T3 Y66 LD OUT NOP LD OUT END 0 1 2 3 4 5 X0 Y16 T3 Y66 Coding Coding Chan...

Page 112: ...by ladder printing Page is changed when the NOPLF instruction is given at the end of a ladder block Not printed by ladder printing X000 X001 13 Not displayed in the ladder mode K MOV 1 D30 K MOV 2 D40...

Page 113: ...n instruction Comparison such as and 6 2 Arithmetic operation instruction Addition subtraction multiplication and division in BIN and BCD INC DEC 6 8 BCD BIN conversion instruction Conversion from BCD...

Page 114: ...LDD AND ANI AND ANDD OR ORI OR ORD 3 The comparison operation instructions are available in the following 36 types Classifica tion Instruction Symbol Ref Page Classifica tion Instruction Symbol Ref P...

Page 115: ...he negative of the BIN value Example Comparison with 4 digit BCD value Since the result is 30927 1384 Y10 does not turn ON 2 When the comparison of 32 bit data is made specify the numeric value using...

Page 116: ...is as shown below Instruction Symbol in Condition Comparison Operation Result Instruction Symbol in Condition Comparison Operation Result S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1 S2 S1...

Page 117: ...m which compares the data of X0 to F and the data of D3 2 Program which compares the BCD value 100 and the data of D3 3 Program which compares the BIN value 100 and the data of D3 4 Program which comp...

Page 118: ...wn below Instruction Symbol in Condition Comparison Operation Result Instruction Symbol in Condition Comparison Operation Result D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1 S2 D S1 S2...

Page 119: ...the BIN value 80000 and the data of D3 and D4 D 4 Program which compares the data of D1 and D0 that of D3 and D4 0 K8 D X000 D3 Y033 Coding 0 LDD K8X000 D3 11 OUT Y033 12 END 0 H D 00018000 D3 Y033 C...

Page 120: ...ions are available in the following 56 types BIN BCD Classification Instruction Symbol Ref Page Instruction Symbol Ref Page 6 10 B 6 22 P 6 10 B P 6 22 D 6 13 DB 6 25 D P 6 13 DB P 6 25 6 10 B 6 22 P...

Page 121: ...case of a 32 bit instruction the result becomes a positive value The operation of a positive value and a negative value is as follows 5 8 13 5 8 3 5 3 15 5 3 15 5 3 15 5 3 1 and remainder 2 5 3 1 and...

Page 122: ...and the BIN data specified at S and stores the addition result into the device specified at D 2 Performs the addition of BIN data specified at S1 and the BIN data specified at S2 and stores the addit...

Page 123: ...IN data specified at D and the BIN data specified at S and stores the subtraction result into the device specified at D 2 Performs the subtraction of BIN data specified at S1 and the BIN data specifie...

Page 124: ...s the difference between the set value and present value timer T3 to Y40 to 53 in BCD Coding 0 LD X005 1 P D3 A0 K2Y038 8 END 0 X005 P K2 D3 A0 Y038 Coding 0 LD X003 1 OUT T3 K18000 2 LD M9036 3 P K18...

Page 125: ...BIN data specified at S and stores the addition result into the device specified at D 2 Performs the addition of BIN data specified at S1 and the BIN data specified at S2 and stores the addition resu...

Page 126: ...n of BIN data specified at D and the BIN data specified at S and stores the addition result into the device specified at D 2 Performs the subtraction of device specified at S1 and the device specified...

Page 127: ...4B when X0 turns on D The following Program subtracts M0 to 23data from A1 data and stores to D10 D11 when XB is switched on Addition subtraction command Executed per scan Executed per scan Executed...

Page 128: ...plication result into the device specified at D 2 When D is a bit device specify the bits beginning with the lower bits Example K1 Lower 4 bits b0 to 3 K4 Lower 16 bits b0 to 15 K8 32 bits b0 to 31 3...

Page 129: ...ient Stored to the lower 16 bits Remainder Stored to the upper 16 bits Storable only in the case of word device 3 At S1 and S2 32678 to 32767 BIN 16 bits can be specified 4 The judgment of whether the...

Page 130: ...f X8 to F and the BIN data of X10 to 1B to Y30 to 3F Program which outputs the quotient obtained by dividing the data of X8 to F by 3 14 to Y30 to 3F when X3 turns on Coding 0 LD X005 1 P K5678 K1234...

Page 131: ...vice specified at D 2 When D is a bit device up to the lower 32 bits can be specified and the upper 32 bits cannot be specified Example K1 Lower 4 bits b0 to 3 K4 Lower 16 bits b0 to 15 K8 32 bits b0...

Page 132: ...d device and only the quotient is stored by use of lower 32 bits in the case of bit device Quotient Stored to the lower 32 bits Remainder Stored to the upper 32 bits Storable only in the case of word...

Page 133: ...18 and D19 to D1 to D4 when X5 turns on D Program which outputs a value obtained by multiplying the data of X8 to F by 3 14 to Y30 to 3F when X3 turns on X005 D D7 D18 D1 0 P Coding 0 LD X005 1 D P D7...

Page 134: ...e specified at D 2 Performs the addition of BCD data specified at S1 and the BCD data specified at S2 and stores the addition result into the device specified at D1 3 At S S1 S2 and D 0 to 9999 BCD 4...

Page 135: ...S S1 S2 and D 0 to 9999 BCD 4 digits can be specified 4 It is required to judge whether the operation result is positive or negative by use of the program Execution Conditions Operation Errors In the...

Page 136: ...BCD data of D3 and that of D8 and transfers the result to M16 to 31 when X1B turns on Coding 0 LD M9036 1 MOVP H5678 D993 6 B P H1234 D993 13 MOVP D993 K4Y030 18 END 0 M9036 P H B 1234 D993 P H MOV 5...

Page 137: ...t into the device specified at D 2 Performs the addition of BCD data specified at S1 and the BCD data specified at S2 and stores the addition result into the device specified at D1 Applicable CPU All...

Page 138: ...s subtraction of the BCD data specified at S1 and the BCD data speci fied at S2 and stores the subtraction result into the device specified at D1 Digits higher than the specified digit are regarded as...

Page 139: ...e same time outputs it to Y30 to 4F Coding 0 LD M9036 1 DMOVP H98765400 D887 8 DB P H00123456 D887 17 DMOVP D887 K8Y030 24 END 0 M9036 P H DB 00123456 D887 P H DMOV 98765400 D887 P K8 DMOV D887 Y030 9...

Page 140: ...D data specified at S1 and the BCD data specified at S2 and stores the division result into the device specified at D 2 In regards to the operation result the quotient and remainder are stored by use...

Page 141: ...any digit of S1 S2 The divisor S2 is 0 Program Examples B Program which performs multiplication of the BCD data of X0 to F and BCD data of D8 and stores the result into A0 and A1 when X1B turns on Co...

Page 142: ...502 and 503 and at the same time outputs the quotient to Y30 to 3F Division of BCD data 5678 and 1234 is performed and the remainder is stored into D502 and D503 P H H B 5678 1234 D502 P K4 MOV D502 Y...

Page 143: ...D data specified at S2 and stores the multiplication result into the device specified at D 2 If D is a bit device the 8 lower digits 32 lower bits of the multiplication result may only be specified K1...

Page 144: ...ed to the lower 32 bits Remainder BCD 8 digits Stored to the upper 32 bits 3 D will not store the remainder of the division result if it is a bit device Execution Conditions Operation Errors In the fo...

Page 145: ...ts the upper 8 digits to Y30 to 4F DB Program which performs division of the BCD data of X20 to 3F and the BCD data of D8 and 9 and stores the result to D765 to 768 when X1B turns on M9036 0 P H H DB...

Page 146: ...f INC or INCP is executed when the content of device specified at D is 32767 32768 is stored into the device specified at D DEC 1 Performs the subtraction to 1 from the device 16 bit data specified at...

Page 147: ...CD X008 P Z K4 BCD C0 Y030 0 P INC Z Z 1 is executed K 21 Z 9 Z is set to 0 when Z 21 or by X7 reset input X007 Coding 0 LD X008 1 BCDP C0Z K4Y030 6 INCP Z 9 LD K21 Z 14 OR X007 15 RST Z 18 END RST Z...

Page 148: ...NC or DINCP is executed when the content of device specified at D is 2147483647 2147483648 is stored into the device specified at D DDEC 1 Performs the subtraction of 1 from the device 32 bit data spe...

Page 149: ...subtracts 1 from the data of D0 and 1 when X0 turns on 2 Program which subtracts 1 from the data of X10 to 27 and stores the result to D3 and 4 when X0 turns on X000 0 P DINC DO Coding 0 LD X000 1 DI...

Page 150: ...ata to BIN data and BCD data Classification Instruction Symbol Ref Page Classification Instruction symbol Ref Page BCD 6 39 BIN 6 42 BCDP 6 39 BINP 6 42 DBCD 6 39 DBIN 6 42 BDC DBCDP 6 39 BIN DBINP 6...

Page 151: ...O O O O O DBCD D O O O O O O O O O O O O O K1 to K8 O O Functions BCD Converts BIN data 0 to9999 of the device specified at S into BCD and transfers the result to the device specified at D Applicable...

Page 152: ...is outside the range of 0 to 9999 When DBCD instruction is used The data of source S is outside the range of 0 to 99999999 Be sure to set to 0 Upper 5 bits S side BIN 99999999 D side BCD 99999999 BCD...

Page 153: ...h outputs the 32 bit data of D0 and D1 to Y40 to Y67 PC output unit Output power source 7 element indicator Coding 0 LD M9036 1 BCDP C4 K4Y020 6 END 0 P K4 BCD C4 Y202 M9036 PC output unit 7 element i...

Page 154: ...K4 S O O O O O O O O O O O O O O DBIN D O O O O O O O O O O O O O K1 to K8 O O Function BIN Converts BCD data 0 to 9999 of device specified at S into BIN and transfers the result to the device specif...

Page 155: ...d after data setting Operation Error In the following case operation error occurs and the error flag turns on Each digit of source S is outside the range of 0 to 9 Always set to 0 S side BCD 99999999...

Page 156: ...s BIN Program which converts the BCD data of X10 to 1B into BIN and stores the result into D8 when X8 turns on PC input unit BCD Digital switch Can be used for others Input power source Coding 0 LD X0...

Page 157: ...N If BCD values above 2147483647 are set at X10 to X37 they are outside the range which can be handled with the 32 bit devices Values of D0 and D1 accordingly become negative For details refer to Sect...

Page 158: ...DMOVP 6 47 CML 6 49 CMLP 6 49 DCML 6 49 Negative transfer DCMLP 6 49 BMOV 6 52 Block transfer BMOVP 6 52 FMOV 6 52 Same data block transfer FMOVP 6 52 XCH 6 56 XCHP 6 56 DXCH 6 56 Interchange DXCHP 6...

Page 159: ...O O O O O O O O O O O O O O O O DMOV D O O O O O O O O O O O O O K1 to K8 O O Functions MOV Transfers the 16 bit data of the device specified at S to the device specified at D DMOV Transfers the 32 bi...

Page 160: ...of A0 and A1 into D0 and D1 2 Program which stores the data of X0 to 1F into D0 and D1 X9036 0 MOV x000 D8 P K3 Coding 0 LD M9036 1 MOVP K3X000 D8 6 END Coding 0 LD M9036 1 DMOVP A0 D0 8 END 0 DMOV A0...

Page 161: ...K1 to K4 S O O O O O O O O O O O O O O O O DCML D O O O O O O O O O O O O O K1 to K8 O O Functions CML Reverses the 16 bit data of S per bit and transfers the result to D DCML Reverses the 32 bit dat...

Page 162: ...s the result to D16 when X3 turns on OFF ON Executed per scan Executed per scan Executed only once Executed only once P Negative transfer command 0 X003 CML D0 D16 P Coding 0 LD X003 1 CML D0 D16 6 EN...

Page 163: ...erses the data of D0 and 1 and stores the result to D16 and 17 when X3 turns on M9038 0 DCML X000 D0 K8 Coding 0 LD M9038 1 DCML K8X000 D0 8 END The number of bits of S The number of bits of D These b...

Page 164: ...n with the device specified at S in blocks to n points which begin with the device specified at D When the same devices have been specified at source and destination data transfer is possible Transfer...

Page 165: ...hich begin with the device specified at D Execution Conditions Operation Error In the following case operation error occurs and the error flag turns on The transfer range exceeds the corresponding dev...

Page 166: ...ram which outputs the data of X20 to X2F to D100 to D103 in units of 4 points M9038 K1 K BMOV D66 Y030 4 0 Coding 0 LD M9038 1 BMOV D66 K1Y030 K4 10 END M9038 K1 K BMOV X020 D100 4 0 Coding 0 LD M9038...

Page 167: ...turn on 2 Program which outputs the data of X20 to X23 to D100 to D103 when XA is turned on Coding 0 LD X00A 1 FMOVP D0 K1Y010 K5 10 END 0 P K1 K FMOV D0 Y010 5 X00A Coding 0 LD X00A 1 FMOVP K1X020 D...

Page 168: ...O O O O O O O XCH D2 O O O O O O O O O O O O O O O K1 to K4 D1 O O O O O O O O O O O O O DXCH D2 O O O O O O O O O O O O O K1 to K8 O O Functions XCH Interchanges the 16 bit data of D1 and D2 DXCH Int...

Page 169: ...e content of D0 and 1 and the data of M16 to 47 when X10 turns on 2 Program which interchanges the content of D0 and 1 with that of D9 and 10 when M0 turns on 0 X008 P XCH T0 D0 Coding 0 LD X008 1 XCH...

Page 170: ...d is on 2 Executes the program of the next step when the jump command is off SCJ 1 Executes the program of specified pointer number starting at the next scan when the jump command changes from off to...

Page 171: ...mer is shortened 5 The CJ SCJ and JMP instructions are also capable of jumping to a step with lower number However it is necessary to exit this closed loop before the watch dog timer times out 6 The d...

Page 172: ...a label located below the END instruction Jump has been made to a step between FOR and NEXT Jump has been made into a subroutine Program Examples SCJ 1 Program which causes a jump during the next scan...

Page 173: ...rogram which causes a jump to the END instruction when X9 turns on 0 4 6 P3 X00C X030 X041 SCJ P3 Y06F Y07E Coding 0 LD X00C 1 SCJ P3 4 LD X030 5 OUT Y06F 6 P3 7 LD X041 8 OUT Y07E 9 END 0 2 X009 6 7...

Page 174: ...f subroutine program POINT For the PC CPUs shown below setting indicated below is required A0J2HCPU AnSCPU AnSHCPU A2CCPU AnCPU AnNCPU A3HCPU A3MCPU A3VCPU In a sequence between the RET instruction in...

Page 175: ...ion After the CALL P instruction is executed the END FEND instruction has been executed before executing the RET instruction The RET instruction has been executed before executing the CALL P instructi...

Page 176: ...h executes the subroutine program when X1 changes from off to on P CALL P33 Y011 X008 0 2 6 P33 13 8 9 X001 X009 X00A Y013 FEND Y033 Y034 RET Coding 0 LD X008 1 OUT Y011 2 LD X001 3 CALLP P33 6 LD X00...

Page 177: ...W R A0 A1 Z V K H P I N Digit specification Index M9012 M9010 M9011 Functions DI 1 Disables the interrupt program until the EI instruction is executed so that interrupt signals are ignored 2 When the...

Page 178: ...errupt programs to be run simultaneously This can be prevented by using the EI instruction in the interrupt programs 5 If the EI or DI instruction is contained in the MC instruction such EI and DI are...

Page 179: ...f the run of interrupt program by DI and EI Sequence program IRET FEND IRET I13 When IRET instruction is executed PC stops operation Interrupt program CJ P20 X000 0 4 5 10 X000 X003 DI EI 11 CJ P10 En...

Page 180: ...ions 1 Calls the microcomputer program created by user and allows the run of microcomputer program 2 When the run of microcomputer program is completed runs the sequence program again starting at the...

Page 181: ...struction must be 5 msec or less If it exceeds 5 msec operation combination between the microcomputer program processing and the internal processing of the PC becomes out of control and the PC cannot...

Page 182: ...am after the timer counter processing and self diagnostic check general data processing data link network refresh processing and I O processing AnS AnN AnSH An A1FX A3H A3M A3V AnA AnU A2AS A2USH S1 A...

Page 183: ...witching between the main and subsequence programs 4 5 11 No switching between the main and subsequence programs 4 5 11 ON CHG instruction is executed every scan and switches between the main and subs...

Page 184: ...When the A3H A3M AnA A3U A4U and Q06H are used the CHG instruction is executed repeatedly while its input condition is on Ladder example The following program is written before END or FEND of the mai...

Page 185: ...on during 1 scan M0 is only switched on during 1 scan 2 When the A3N A73 and A3V are used execution contents are always same Ladder example The following program is written at step 0 of the main and...

Page 186: ...of the main and subsequence programs Timing chart OFF M0 is not switched on ON M0 is only switched on during the first scan of the subsequence program selected by the CHG instruction executed after X...

Page 187: ...MOVP instruction is only executed once MOVP instruction is only executed once 2 When the A3N A73 and A3V are used execution contents are always same Ladder example The following program is written at...

Page 188: ...equence programs Timing chart OFF MOVP instruction is not executed ON MOVP instruction is only executed duing the first scan of the subsequence program selected by the CHG instruction executed after X...

Page 189: ...lue is incremented by 1 after END FEND CHG is executed 2 When the A3N A73 and A3V are used execution contents are always same Ladder example The following program is written at step 0 of the main and...

Page 190: ...hanged ON C0 count value is incremented by 1 after END FEND CHG is executed during the first scan of the program selected by the CHG instruction executed after X0 is switched on Operation depending on...

Page 191: ...n sub program is 0 in the sub main program timer set value storage area Ladder example The following program is written after the main sequence program and the same timer number is not used in the sub...

Page 192: ...n sequence program run even if its input condition changes Ladder example The following program is written after the main sequence program and the same coil is not used in the subsequence program Timi...

Page 193: ...mory in the save area Since the CHG instruction for the A3CPU is executed only when input conditions are turned ON programs must be written in the forms shown below 2 For A3N A73 and A3V CPUs Since th...

Page 194: ...gram run or vice versa M9051 M9056 and M9057 contacts should be used to disable the CHG instruction so that the CHG instruction may not switch the currently running program to the program currently be...

Page 195: ...processing END processing and link refresh processing 3 The COM instruction may be used any number of times in the sequence program In this case note that the sequence program scan time increases the...

Page 196: ...equence program By using the COM instruction in the local station data can be received securely 5 By using the COM instruction the local station a link refresh is made every time the local station rec...

Page 197: ...ry flag Error flag X Y M L S B F T C D W R A0 A1 Z V K H P I N Digit specification Index M9012 M9010 M9011 Functions DI 1 Disables link refresh until the EI instruction is executed 2 Sequence processi...

Page 198: ...D processing Wait for constant scan I O refresh END processing Wait for constant scan I O refresh DI in struction DI in struction DI in struction Sequence processing Sequence processing Sequence proce...

Page 199: ...e EI DI instruction is executed M9053 may either be on or off 4 If the EI or DI instruction is contained in the MC instruction such EI and DI are executed regardless of execution of the MC instruction...

Page 200: ...to be received and output signals to be output to output modules 2 Partial refresh is used to change ON OFF status of input X and output Y during 1 scan when the I O control mode is the refresh mode...

Page 201: ...d device number of devices to be refreshed is set If the number is set between Yn0 and Yn7 Xn0 and Xn7 refresh is done for the number of specifi ed points from Yn0 Xn0 and if the number is set between...

Page 202: ...mber specified Program Examples SEG 1 The following example refreshes Y10 to Y27 2 Pulse output using the SET and RST instructions in direct mode should be changed as shown below when the I O control...

Page 203: ...specified data 7 31 Data processing instruction Data processing such as 16 bit data search decode and encode 7 40 FIFO instruction Read write of FIFO table 7 59 Buffer memory access instruction Read...

Page 204: ...Exclusive OR DXORP 7 12 WOR 7 8 WXNR 7 16 WORP 7 8 WXNRP 7 16 DOR 7 8 DXNR 7 16 Logical add DORP 7 8 Exclusive NOR DXNRP 7 16 REMARK The logical operation instructions perform the following processin...

Page 205: ...O O K1 to K8 O O Functions WAND 1 Performs the logical product of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the device s...

Page 206: ...erated as 0 DAND 1 Performs the logical product of the 32 bit data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D 2...

Page 207: ...data of X10 to 1B and the data of D33 and outputs the result to the Y30 to 3B when XA turns on D10 1234 1204 X00A 0 P H WAND FF0F D10 Coding 0 LD X00A 1 WANDP HFF0F D10 6 END X00A 0 P K3 WAND X010 D33...

Page 208: ...100 then transfers the result to the M80 to 103 when X8 turns on X00A 0 P K3 K3 WAND X010 D33 Y030 Coding 0 LD X00A 1 WANDP K3X010 D33 K3Y030 8 END Regarded as 0 Do not change X008 0 P K6 DAND X030 D...

Page 209: ...and sends the result to the Y100 to 11F when M16 turns on M16 0 P DAND D0 D108 P K8 DMOV D108 Y100 Logical product of the 32 bit data of D0 and 1 and the 32 bit data of D108 and 109 is performed and...

Page 210: ...O O O O O O K1 to K8 O O Functions WOR 1 Performs the logical add of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the devic...

Page 211: ...operated as 0 DOR 1 Performs the logical add of the 32 bit data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D 2 As...

Page 212: ...to D33 when XA turns on 4 Program which performs logical add of the data of X10 to 1B and the data of D33 and sends the result to the Y30 to 3B when XA turns on X00A 0 P WOR D20 D10 Coding 0 LD X00A 1...

Page 213: ...P H DMOV 0000F0FF D66 P K8 DOR X000 D66 Hexadecimal number of F0FFH is stored into D66 and 67 Logical add of the 32 bit data of X0 to 1F and the 32 bit data of D66 and 67 is performed and the result i...

Page 214: ...O O O O O O O O K1 to K8 O O Functions WXOR 1 Performs the exclusive OR of the 16 bit data of device specified at D and the 16 bit data of device specified at S per bit and stores the result into the...

Page 215: ...erated as 0 DXOR 1 Performs the exclusive OR of the 32 bit data of device specified at D and the 32 bit data of device specified at S per bit and stores the result into the device specified at D 2 As...

Page 216: ...o D33 when XA turns on 4 Program which performs exclusive OR of the data of X10 to 1B and the data of D33 and sends the result to the Y30 to 3B when XA turns on X00A 0 P WXOR D20 D10 Coding 0 LD X00A...

Page 217: ...mber of different bits to D16 when X6 turns on X006 0 P K8 DXOR X020 D9 P DSUM D9 Exclusive OR of the 32 bit data of X20 to 3F and the data of D9 and 10 is performed Comparing 32 bit data of D9 and 10...

Page 218: ...O O O O O O O O O O K1 to K8 O O Functions WXNR 1 Performs the exclusive NOR of the 16 bit data of device specified at D and the 16 bit data of device specified at S and stores the result into the dev...

Page 219: ...specified at S and stores the result into the device specified at D 2 As for bit devices data of them below digit specification is operated as 0 Execution Conditions POINT The DXNR instruction in the...

Page 220: ...to D7 when X0 turns on X00C 0 P SUM D99 Exclusive NOR of the 16 bit data of X30 to 3F and the data of D99 is performed and the result is stored into D99 Comparing the 16 bit data of D99 the total num...

Page 221: ...number of the same bit patterns to D18 when X6 turns on X006 0 P K8 DXNR X020 D16 P DSUM D16 Exclusive NOR of the 32 bit data of X20 to 3F and the data of D16 and 17 is performed Among 32 bit data of...

Page 222: ...t data of device specified at D and stores the result in device specified at D 2 Used to reverse the positive sign to the negative sign and vice versa Execution Conditions Applicable CPU All CPUs K1 t...

Page 223: ...rns on and obtains the absolute value when the result is negative X00A 0 D10 D20 P D20 D10 When D10 D20 M3 turns on D10 D20 is executed Coding 0 LD X00A 1 AND D10 D20 6 OUT M3 7 LD X00A 8 P D20 D10 13...

Page 224: ...ata stored in the accumulator Classification Instruction Symbol Ref Page Classification Instruction Symbol Ref Page ROR 7 23 ROL 7 25 RORP 7 23 ROLP 7 25 RCR 7 23 RCL 7 25 RCRP 7 23 RCLP 7 25 DROR 7 2...

Page 225: ...rry flag The carry flag is 1 or 0 depending on the status prior to the execution of ROR RCR Rotates the data of A0 0 bits to the right including the carry flag The carry flag is 1 or 0 depending on th...

Page 226: ...4 END X00C P K RCR 3 0 Coding 0 LD X00C 1 RCRP K3 4 END Before execution carry flag is either 1 or 0 Before execution To carry flag To carry flag To carry flag Carry flag M9012 Contents of B0 before...

Page 227: ...rry flag The carry flag is 1 or 0 depending on the status prior to the execution of ROL RCL Rotates the data of A0 0 bits to the left including the carry flag The carry flag is 1 or 0 depending on the...

Page 228: ...execution Contents of B15 when n 1 Contents of B15 when n 2 Carry flag M9012 To B0 To B0 To B0 n 1 n 2 n 3 Before execution Progress After execution Before execution carry flag is either 1 or 0 X00C...

Page 229: ...rry flag The carry flag is 1 or 0 depending on the status prior to the execution of DROR DRCR Rotates the data of A0 and 1 0 bits to the right including the carry flag The carry flag is 1 or 0 dependi...

Page 230: ...DRORP K3 12 END P K DMOV 1 A0 X00A X00C P K DRCR 3 0 8 Coding 0 LD X00A 1 DMOVP K1 A0 8 LD X00C 9 DRCRP K3 12 END Contents of B0 before execution n 1 Contents of B0 when n 1 n 2 Contents of B0 when n...

Page 231: ...its to the left without including the carry flag DRCL Rotates the data of A0 and 1 n bits to the left including the carry flag The carry flag is 1 or 0 depending on the status prior to the execution o...

Page 232: ...D X00A 1 DMOVP H80000000 A0 8 LD X00C 9 DROLP K3 12 END Carry flag M9012 Contents of B31 before execution Contents of B31 when n 1 Contents of B31 when n 2 To B0 n 1 n 2 n 3 To B0 To B0 Progress Befor...

Page 233: ...instructions perform the shifting of data Classification Instruction Symbol Ref Page Classification Instruction Symbol Ref Page SFR 7 32 SFL 7 32 SFRP 7 32 SFLP 7 32 BSFR 7 35 BSFL 7 35 BSFRP 7 35 BS...

Page 234: ...O O O O O O n O O O O O Functions SFR 1 Shifts the 16 bit data of device specified at D to the right by n bits n bits which begin with the highest bit change to 0 2 For T C the present value count val...

Page 235: ...the contents of D8 five bits to the right when X1C turns on Before execution After execution Carry flag M9012 0 is entered 2 In regards to T C the present value count value is shifted The shift of se...

Page 236: ...MELSEC A SFL Program which shifts the data of M6 to 13 two bits to the left when X8 turns on Coding 0 LD X008 1 SFLP K2M6 K2 6 END 0 X008 P K2 K SFL M6 2 Before execution After execution Carry flag M9...

Page 237: ...Shifts n bits which begins with the bit device specified at D to the right by one bit BSFL Shifts n bits which begin with the bit device specified at D to the left by one bit Applicable CPU All CPUs...

Page 238: ...rns on BSFL Program which shifts the outputs of Y60 to 6F to the left when X4 turns on OFF ON Executed per scan Executed per scan Executed only once Executed only once P Shift command Specification ra...

Page 239: ...to 0 3 For T C the present value count value is shifted The shift of set value cannot be performed DSFL 1 Shifts the word devices of n points which begin with the device specified at D to the left by...

Page 240: ...ollowing case operation error occurs and the error flag turns on n is a negative value Program Examples DSFR Program which shifts the contents of D683 to 689 to the right when XB turns on OFF ON Execu...

Page 241: ...9 MELSEC A DSFL Program which shifts the contents of D683 to 689 to the left when XB turns on 0 X00B Coding 0 LD X00B 1 DSFLP D683 K7 8 END P K DSFL D683 7 Before execution After execution Specificati...

Page 242: ...f data Classification Instruction Symbol Ref Page SER 7 41 Search SERP 7 41 SUM 7 43 SUMP 7 43 DSUM 7 43 Bit check DSUMP 7 43 DECO 7 46 DECOP 7 46 ENCO 7 46 Decode Encode ENCOP 7 46 7 segment decode S...

Page 243: ...ied at S1 as a keyword 2 Stores to A1 the number of data which have coincided with the keyword and stores to A0 at which point from S2 the first coinciding device number relative value is located 3 Wh...

Page 244: ...s exceeded Program Example SER Program which compares the data of D883 to 887 with 123 when XB turns on X00B 0 P K K SER 123 D883 5 Coding 0 LD X00B 1 SERP K123 D883 K5 10 END Searched data 1 2 3 3 He...

Page 245: ...n the 16 bit data of device specified at S The A0J2HCPU stores the total number of bits also in D9003 DSUM Stores to A0 the total number of bits which are one found in the 32 bit data of device specif...

Page 246: ...ly once Executed only once Operation command P Coding 0 LD X008 1 SUMP K4X030 4 END X008 0 P K4 SUM X030 Counted data Total number of 1s is stored into A0 Searching the data of X20 to 3F the number of...

Page 247: ...7 APPLICATION INSTRUCTIONS 7 45 MELSEC A Transfer by MOVP instruction Addition by P instruction Number of data which are on among X20 to 5B...

Page 248: ...esponding to the binary value specified with the lower n bits in S a bit in D turns ON 7 0 1 ON 0 0 0 0 0 0 1 1 0 6 5 4 3 2 1 0 D n 3 S Binary value 6 2 For n 1 to 8 can be specified 3 When n is 0 no...

Page 249: ...or the last bit position Execution Conditions Operation Errors In the following case operation error occurs and the error flag turns on n in other than 0 to 8 0 exists in all devices from S to 2n when...

Page 250: ...M10 D8 3 CIRCUIT END Coding 0 LD X00C 1 ENCOP M10 D8 K3 10 END When 8 is specified as effective bits 256 points are occupied When 3 is specified as effective bits 8 points are occupied Device D8 Encod...

Page 251: ...the lower four bits of S to seven segment display data and stores the result to D 2 When the device is a bit device Y M L S B F indicates the head number of device which will store the seven segment...

Page 252: ...1 1 0 2 0010 0 1 0 1 1 0 1 1 3 0011 0 1 0 0 1 1 1 1 4 0100 0 1 1 0 0 1 1 0 5 0101 0 1 1 0 1 1 0 1 6 0110 0 1 1 1 1 1 0 1 7 0111 0 0 1 0 0 1 1 1 8 1000 0 1 1 1 1 1 1 1 9 1001 0 1 1 0 1 1 1 1 A 1010 0 1...

Page 253: ...gram which converts the data of XC to F to seven segment display data and sends the display data to Y38 to 3F when X0 turns on X0 Y38 to 3F Y38 to 3F do not change until the next data is output Coding...

Page 254: ...M9012 M9010 M9011 D O O O O O O O O O n O O O O Functions BSET 1 Sets 1 the n th bit of word device specified at D 2 For n 0 to 15 are effective When 15 is exceeded the instruction is executed at the...

Page 255: ...ogram which sets the 3rd bit and 8th bit of D19 when X18 turns on OFF ON Executed per scan Executed per scan Executed only once Executed only once Set Reset command P Coding 0 LDI X00B 1 BRSTP D8 K8 8...

Page 256: ...n points which begin with the device specified at D 2 The upper 12 bits of devices of n points which begin with the device specified at D are set to 0 3 For n 1 to 4 can be specified S First device n...

Page 257: ...ied at D 2 The bits of upper 4 n digits of device specified at D are set to 0 3 For n 1 to 4 can be specified 4 When n is 0 no processing is performed and the contents of device of D do not change Exe...

Page 258: ...X0 turns on UNI Program which stores the lower four bit data of D0 to 2 to the D10 when X0 turns on X000 0 P K DIS D0 D10 4 Coding 0 LD X000 1 DISP D0 D10 K4 10 END Before execution After execution S...

Page 259: ...fied alphanumeric characters into the ASCII code and stores the result into devices of four points which begin with the device specified at D Executed Conditions Applicable CPU All CPUs D Head number...

Page 260: ...and displays the ASCII data of D88 to 95 at the LED indicator on the front face of CPU when X16 turns on X008 0 ASC ABCDEFGH D88 ASC IJKLMNOP D92 Eight characters A to H are converted into ASCII code...

Page 261: ...TIONS 7 59 MELSEC A 7 5 FIFO Instructions The FIFO instructions perform the write and read of data to and from the FIFO table Classification Instruction Symbol Ref Page FIFW 7 60 Write FIFWP 7 60 FIFR...

Page 262: ...le content of pointer 2 Adds 1 to the content of pointer For the pointer use the device specified at D 2 To use the FIFW instruction for the first time clear the pointer specified at D before executin...

Page 263: ...when the content of pointer is 0 operation error occurs Execution Conditions Operation Errors In the following case operation error occurs and the error flag turns on FIFO table head address pointer...

Page 264: ...is program turns on Y60 to disable the execution of FIFW instruction The data storage location is as shown below when the pointer value is 5 Coding 0 LD D38 K8 5 OUT Y060 6 LD X00B 7 ANI Y060 8 FIFWP...

Page 265: ...e data to the Y30 to 3F Data is read as shown below when the pointer value is 7 Coding 0 LD K0 D38 5 OUT Y060 6 LD X00B 7 ANI Y060 8 FIFRP K4Y030 D38 15 END Pointer Before execution After execution K...

Page 266: ...G is used There are 16 types of buffer memory access instructions as shown below Classification Instruction Symbol Ref Page FROM 7 65 FROMP 7 65 DFRO 7 65 Special function module data read DFROP 7 65...

Page 267: ...s specified at n2 of buffer memory inside the special function module specified at n1 and stores the data into devices which begin with the device specified at D AnS AnN AnSH An A1FX A3H A3M A3V AnA A...

Page 268: ...s on Access cannot be made to the special function module The I O number specified at n1 is not a special function module n3 points which begin with the device specified at D exceeds the specified dev...

Page 269: ...cuted for a special function module frequently in a short scan time the objective special function module may fail to process correctly To execute a FROM instruction for a special function module set...

Page 270: ...ecified at n1 When a constant is designated to S writes the same data value designated to S to the area of n3 points starting from the specified buffer memory S can be designated in the following rang...

Page 271: ...d buffer memory S can be designated in the following range 2147483648 to 2147483647 or 0H to FFFFH n3 2 words The same data is written Special function module buffer memory When 70000 is designated to...

Page 272: ...s on DTO The following program writes D1 value to A68AD loaded in I O numbers 040 to 05F buffer memory address 0 and D2 value to address 1 when X0 is switched on POINT If a TO instruction is executed...

Page 273: ...th the one specified at D1 AnS AnN AnSH An A1FX A3H A3M A3V AnA AnU A2AS A2USH S1 A2USH board QCPU A A Mode A0J2H A2C A52G A73 A3N board Applicable CPU X X X X X X X X O X X Remark K1 to K4 K1 to K8 n...

Page 274: ...terminal module 100 Example When the head number of remote terminal module is 9 specify K109 9 100 2 The bit device specified at D2 is used as a communication complete flag This device turns ON after...

Page 275: ...uted to the end even though the condition signal before the FROM P DFRO P instructions is turned OFF 5 The device number specified at D2 is checked If the same device number was already specified to e...

Page 276: ...xecution Conditions Operation Errors In the following cases operation error occurs and the error flag turns ON When the station number specified at n1 is not of a remote terminal When n3 points which...

Page 277: ...ta of 2 words from address 14 of buffer memory of the AD61C head station number 1 to D10 and D11 when X0 is turned ON K K K DFRO 1 14 D10 1 PRC M0 Y000 0 X000 M0 turns ON when communication processing...

Page 278: ...n1 0 n2 to Remote terminal buffer memory CPU module Device specified at S n3 points n3 words AnS AnN AnSH An A1FX A3H A3M A3V AnA AnU A2AS A2USH S1 A2USH board QCPU A A Mode A0J2H A2C A52G A73 A3N boa...

Page 279: ...gin with the device specified at S to the address starting with the one specified at n2 of buffer memory in the remote terminal module specified at n1 Remote terminal buffer memory Device specified at...

Page 280: ...instruction of the scan during which communication processing with a specified remote terminal module is completed and turns OFF after execution of the END instruction of the next scan 3 Though the d...

Page 281: ...ons 6 After completion of a processing which is executed according to registered data the bit device specified at D1 is turned ON and deleted from the communication request registration areas 7 The co...

Page 282: ...specified at S exceed the specified device range When the device specified at D1 is not a usable device When the communication request registration areas are full Program Examples TO PRC A program whi...

Page 283: ...D1000 to address 5 and content of D1001 to address 6 of buffer memory of the AD61C head station number 1 when X0 is turned ON K K K DTO 1 5 D1000 1 PRC M1 Y000 0 X000 M0 turns ON when communication p...

Page 284: ...pecial block specified by n1 and writes the data to the A1FXCPU beginning with the device number specified by D AnS AnN AnSH An A1FX A3H A3M A3V AnA AnU A2AS A2USH S1 A2USH board QCPU A A Mode A0J2H A...

Page 285: ...FROP instructions are executed only once at the rising edge OFF ON of the read instruction Operation Errors In the following cases operation error occurs and the error flag turns on Access to a specia...

Page 286: ...nterruption program is not executed even at the occurrence of an interrupt For the interrupt occurred during the execution of the FROM DFRO TO DTO instruction the interruption program that corresponds...

Page 287: ...eginning with the address specified by n2 in the special module special block specified by n1 AnS AnN AnSH An A1FX A3H A3M A3V AnA AnU A2AS A2USH S1 A2USH board QCPU A A Mode A0J2H A2C A52G A73 A3N bo...

Page 288: ...fer memory in the special module special block Device specified at S A1FXCPU 0 n2 n3 2 points n3 2 words n2 1 When a constant is designated to S writes the same data value designated to S to the area...

Page 289: ...TO is given priority While the FROM DFRO TO DTO instruction is executed interrupt is disabled and interruption program is not executed even at the occurrence of an interrupt For the interrupt occurre...

Page 290: ...O O O O O O O O O Functions 1 When the processing of FOR to NEXT instructions is executed n times unconditionally performs the processing of the next step to the NEXT Instruction 2 At n 1 to 32767 can...

Page 291: ...instructions The JMP instruction is executed in the FOR to NEXT processing to exit from the FOR to NEXT processing There is a STOP instruction in the FOR to NEXT processing Program Example FOR NEXT Pr...

Page 292: ...wn below The local and remote I O station access instructions can be used in the sequence program of the master station only Classification Instruction Symbol Ref Page Read LRDP 7 91 Local station Wri...

Page 293: ...ed M9200 of the master station turns ON When the execution is completed M9201 of the master station turns ON Since M9200 and M9201 remain ON after the completion of execution turn them off by the sequ...

Page 294: ...other than 1 to 64 n2 value is other than 1 to 32 3 Specified local station is not provided with data link 4 Specified station number is not of the local station Operation error 5 If the LRDP instruc...

Page 295: ...1 10 ANI M9202 11 ANI M9203 12 LRDP K3 D3 D99 K6 23 MPP 24 AND M9201 25 RST M0 26 RST M9200 29 RST M9201 32 END Use a pulse signal for this command 1 Provide interlock using the LRDP instruction execu...

Page 296: ...01 M9202 and M9203 so that the LRDP instruction and or the LWTP instruction may not be executed during the data read from local stations by the LWTP instruction 4 Values of D9201 of the master station...

Page 297: ...tion n2 points starting at D exceed the specified device range Specification of n2 is other than 1 to 32 POINT If an LWTP instruction is executed by a CPU which is not for data link or when the mode s...

Page 298: ...3 10 ANI M9200 11 ANI M9201 12 LWTP K3 D3 D99 K6 23 MPP 24 AND M9203 25 RST M0 26 RST M9202 29 RST M9203 32 END Turned OFF by the sequence program Turned OFF by the sequence program Turned ON by the P...

Page 299: ...2H A2C A52G A73 A3N board Applicable CPU O O O O X O O O O O O Remark RFRP n1 n2 D n3 RTOP n1 n2 S n3 Write command Read command n1 Head I O number of special function module specified by master stati...

Page 300: ...e RFRP instruction execution turn it OFF by the sequence program 4 When the RFRP instruction cannot be executed due to error of specified special function module X n1 1D turns ON If this is the case c...

Page 301: ...M0 7 MPS 8 ANI Y14E 9 ANI X15E 10 ANI Y14F 11 ANI X15F 12 RFRP H0140 K10 W052 K10 23 MPP 24 AND X15E 25 RST M0 26 RST Y14E 27 END 0 4 6 Use a pulse signal for this command 1 Provide interlock using th...

Page 302: ...specified at S should be specified in the range of parameter assignment from the master station to the remote I O station For parameter setting refer to POINT below 3 It is not allowed to use two or...

Page 303: ...se If a pulse is not used following execution of the RTOP instruction will be disabled 2 The contact which corresponds to M0 shown in the program example should be turned ON by the SET instruction If...

Page 304: ...cution judgment D9224 to D9227 For details refer to the type MELSECNET MELSECNET B Data Link System Reference Manual IB NA 66350 Coding 0 LD X003 1 PLS M1 4 LD M1 5 SET M0 6 LD M0 7 MPS 8 ANI Y14F 9 A...

Page 305: ...master to remote I O station link registers W Master station RFRP instruction Remote I O station Data Control of OS The number of points which is equal to the number of special function modules of re...

Page 306: ...s equivalent to the LEDA and LEDB instructions with the A3A A3U and A4U edit character string data using dedicated instructions provided for the AnA AnU before using the LED instruction 3 The priority...

Page 307: ...acters are displayed at the LED indicator by LEDA instruction The latter half 8 characters are blanked The latter half 8 characters are displayed at the LED indicator by LEDB instruction The latter ha...

Page 308: ...S to 00H code to the output module specified at D Note that the second function cannot be used with the An and A3V These functions can be switched by ON OFF setting of M9049 CPUs other than An and A3...

Page 309: ...during sequence processing irrespective of I O refresh after END 3 In addition to the ASCII code a strobe signal 10 msec ON 20 msec OFF is also output from the device specified at D 8 4 Until the exe...

Page 310: ...ied at D 8 4 Until the execution of sending the ASCII code of 16 characters after execution of the PR instruction the PR instruction execution flag device D 9 is ON 5 Multiple PR and PRC instructions...

Page 311: ...truction is executed between the processings 3 In addition to the ASCII code a strobe signal 10 msec ON 20 msec OFF is also output from the device specified at D 8 4 Until the execution of sending the...

Page 312: ...o 7 when X0 turns on and outputs the ASCII code of D0 to 7 into the Y14 to 1D when X1 turns on Executed only once PR PRC ON OFF ASCII print command 32 X00 X000 When X0 turns on ABCDEFGHIJKLMNOP is con...

Page 313: ...r A3V is used and M9049 is OFF 00H must be specified in D8 in this example as an error will result without the NUL 00H code Not necessary for the An and A3V ASCII code of A to H is stored into D0 to 3...

Page 314: ...ION INSTRUCTIONS 7 112 MELSEC A When comment of Y35 is Coding 0 LD X000 1 SET Y035 2 PRC Y035 Y060 9 LD X003 10 RST Y035 11 END ASCII code Strobe signal PRC instruction execution flag PRC instruction...

Page 315: ...ecified at S at the LED indicator on the front face of CPU 2 When the ASCII data is not stored at the eight points which begin with the device specified at S 1 T C D W Blank 2 R What will be displayed...

Page 316: ...ide the comment range the LEDC instruction results as follows Specification of S Operation of LED with comment Comment of device is displayed at LED indicator Inside comment range specification Withou...

Page 317: ...ED D88 31 END Coding 0 LD M9036 1 OUT T5 K300 2 LD T5 3 RST T5 6 LEDC D0Z 9 INCP Z 12 LD K16 Z 17 RST Z 20 END 30 seconds are counted Comment of D 0 Z is displayed on the LED indicator on the front of...

Page 318: ...spexified by LEDA and LEDB at the LED indicator on the CPU front 2 The displays of LEDA and LEDB are as shown below 3 The following items can be displayed by the display instructions on the LED displ...

Page 319: ...ayed by the LED instruction will disappear if the first eight are rewritten by the LEDA instruction The first eight characters will disappear if the second eight are rewritten by the LED instruction C...

Page 320: ...though the CPU can continue the operation Reset the ERROR LED or error display on the front of the CPU when the self diagnosis error is displayed The contents in M9008 and D9008 are not reset so they...

Page 321: ...he F number which has been newly stored in D9125 to D9009 5 Reduces 1 from the data of D9124 However when D9124 is 0 the data remains 0 6 Displays the F number stored in D9009 at the LED indicator Whe...

Page 322: ...NT The LEDR instruction is used as the end command for the extended application instructions for the AnA F and AnU For details refer to the AnSHCPU AnACPU AnUCPU Programming Manual Dedicated Instructi...

Page 323: ...the reset of WDT the failure check and the set and reset of carry flag Classification Instruction Symbol Ref Page WDT reset WDT 7 122 Failure check CHK 7 124 Set SLT 7 131 Status latch Reset SLTR 7 1...

Page 324: ...dog timer depending on conditions If the scan time exceeds the set value of watch dog timer at every scan change the set value of watch dog timer by the parameter setting of peripheral equipment A6GPP...

Page 325: ...t with parameters the A3H A3M and AnA A2AS and AnU use fixed WDT values Execution Conditions Program Example WDT Program used when the setting of watch dog timer is 200 ms and the period of time from...

Page 326: ...e Word 16 bit device Constant Pointer Level Carry flag Error flag X Y M L S B F T C D W R A0 A1 Z V K H P I N Digit specification Index M9012 M9010 M9011 D1 O O O O O O D1 O O O O O O O O O O O O O O...

Page 327: ...d the error step number is not stored Error step remains 0 Example Create the following circuit to check cycle time over in the system illustrated above Follow these instructions in creating a circuit...

Page 328: ...ke end and backward stroke end sensors are actuated in forward run Condition 1 Condition 2 Condition 3 Condition 4 Condition 5 Condition 6 X 1 SET M0 MOV D0 Error code 1 Both of the forward stroke end...

Page 329: ...ogram However it is impossible to use it at 2 or more points simultaneously 6 Set check condition with the LD or AND instruction before the CHK instruction Other contact commands cannot set check cond...

Page 330: ...f error code No 4 201 2 contact No 1 501 2 contact No 1 801 2 contact No 1 Condition No 5 data of error code No 5 301 2 contact No 1 601 2 contact No 1 901 2 contact No 1 Condition No 6 data of error...

Page 331: ...umbers for the CHK Instruction Execution The CHK instruction is executed every scan regardless of ON OFF status of check Conditions condition contact points POINT The CHK instruction cannot be written...

Page 332: ...struction is in the format determined by the CHK instruction Check the NOP instruction in list mode because it is not displayed in the ladder mode of GPP Bit device specified at D1 Label P254 CJ P CHK...

Page 333: ...u latch is allowed for the following devices Data memory ON OFF displays of X Y M B and F Present valuses of T and C Contents of D W A0 A1 Z and V Contents of file registers 3 When the SLT instruction...

Page 334: ...2N S1 A1S S1 A1SJ S3 A2S S1 8 5 ms 25 ms A3N A73 A3N board 8 5 ms 37 ms A3H A3M 4 1 ms 10 4 ms A2A S1 A2U A2AS S1 S30 S60 2 9 ms 12 9 ms A3A A3U A4U A3A 2 2 ms 9 7 ms A2USH S1 A2USH board 1 3 ms 4 5 m...

Page 335: ...ed 2 Sampling trace data are as follows X Y M L S B F T C coil contact Maximum of eight contacts Maximum of 16contacts with A1A A2AS and AnU T C D W R A0 A1 Z V Maximum of three points Maximum of 10 p...

Page 336: ...tion for the STRA instruction 2 By executing the STRAR instruction the STRA instruction is enabled again 3 Turns off M9043 Excecution Conditions ON Executed only once Sampling trace command OFF ON Exe...

Page 337: ...git specification Index M9012 M9010 M9011 Functions STC 1 Sets turns on the carry flag contact M9012 CLC 1 Resets turns off the carry flag contact M9012 Execution Conditions Applicable CPU All CPUs ST...

Page 338: ...the carry flag when the result is 9999 or less M0 0 P K4 B X000 D0 D1 K4 X000 D1 BCD data of X0 to F and that of D0 are added and the result is stored into D1 When addend addition result or augend add...

Page 339: ...ON at the scan count specified at n1 and to OFF at the scan count specified at n2 2 At the initial status when the timing pulse input is off the timing pulse is off 3 When n1 and n2 are set to 0 the t...

Page 340: ...en if the timing pulse input turns off the timing pulse by the DUTY instruction does not turn off Therefore to stop the timing pulse execute the circuit as shown below 0 X008 K K DUTY 1 3 M9021 Coding...

Page 341: ...l Refer to Name Symbol Refer to Start request DSFRP 7 140 Data change DSFLP 7 144 For control parameters positioning devices positioning procedures and preparation of servo programs required for posit...

Page 342: ...ys of setting of servo program number direct setting and indirect setting 1 Direct setting Servo program number is set directly with numerals 0 to 4095 Example To set servo program number 50 set K50 f...

Page 343: ...ation and axes 4 and 5 for circular interpolation specify either of axes 2 and 3 and either of axes 4 and 5 for simultaneous start 2 The DSFRP instruction used with the A73CPU cannot use index qualifi...

Page 344: ...mple 1 A program to execute a specified servo program only once when X80 is ON Coding 0 LD M9036 1 OUT M2000 2 LD X080 3 PLS M0 6 LD M0 7 SET M1 8 LD M1 9 ANI M2001 10 ANI M2002 11 DSFRP D12 K1 18 RST...

Page 345: ...24 END ABS 2 AXIS 1 1000 AXIS 2 1000 SPEED 1000 ABS 2 AXIS 1 500 AXIS 2 5000 SPEED 2000 ABS 2 AXIS 1 3000 AXIS 2 500 SPEED 200 K0 Servo program K1 K2 When execution of the DSFRP instruction is complet...

Page 346: ...e moving are changed to the data of speed change registers 2 Axes for present position data speed change are set with D as follows Example Starting axes are set as follows Axis 4 D4 Interpolation with...

Page 347: ...is 1 Axis 2 Axis 3 Axis 4 Axis 5 Axis 6 Axis 7 Axis 8 Upper date D961 D967 D973 D979 D985 D991 D997 D1003 Lower date D960 D966 D972 D978 D984 D990 D996 D1002 REMARK n stands for the number of axes n 1...

Page 348: ...the minor error control change error occurs and present position data change or speed change is not executed The error detection flag Xn7 is set and the error code is stored in the minor error code ar...

Page 349: ...ANI M2002 32 DBINP K8X090 D966 41 DSFLP D2 K0 48 RST M10 49 END The present position data change storage flag M10 is set when X81 is turned ON When axis 2 is not started the BCD data of X90 to XAF are...

Page 350: ...M11 29 SET M10 30 LD M10 31 DBIN K8X090 D968 40 DSFLP D2 K1 47 RST M10 48 END The speed change storage flag M10 is set when X81 is turned ON The BCD data of X90 to XAF are stored in D968 and D969 pos...

Page 351: ...A52G 8086 10 MHz 0 to 14K bytes A1SH A1SJH 8086 30 MHz 0 to 14K bytes A2SH S1 0 to 26K bytes A1FX 8086 40 MHz 0 to 26K bytes A0J2H 0 to 14K bytes A2C 8086 8 MHz 0 to 14K bytes INT INTO IRET IN OUT HL...

Page 352: ...the program and the parameters to the user s floppy disk 2 Load the SW UTLP system disk into the peripheral device and read the parameters and sequence program from the user disk to the user program...

Page 353: ...gram using the SUB instruction Specify input data in any word device D W R Specify the data required for program run device number for storing the operation result etc in any word device Specify the h...

Page 354: ...nitialize the registers to be used in the microcomputer program at the start of the microcomputer program Contents of the registers when the microcomputer program is called from the sequence program a...

Page 355: ...ap the specification of n is as shown below In the SUB instruction specify as shown below By changing the offset value specified at n multiple microcomputer programs can also be called Fig 8 3 Calling...

Page 356: ...called consecutively This method can shorten the processing time of a microcomputer program called by one SUB instruction 8 3 1 Memory map The microcomputer program may be used in the following areas...

Page 357: ...nce to AL 8 bit operation or AX 16 bit operation register b CPU other than AnSHCPU and A1FXCPU The contents of memory indicated by the S1 register are sent to AL 8 bit operation or AX 16 bit operation...

Page 358: ...S1 A2S 8000H to 827FH Y0 to 1FF A2 S1 A2N S1 A2S S1 8200H to 82FFH Y0 to 3FF Output Y A3 A3N A3V A73 A3N board A1SH A1SJH A2SH A2SH S1 A1FX 8200H to 83FFH Y0 to 7FF 8200H 8202H 8204H Odd address Even...

Page 359: ...8 9 MELSEC A REMARK Communication of input output information with an input output module is executed only in the address range indicated below A1FX X Y20 to FF A1SH A1SJH X Y0 to FF A2SH X Y0 to 1FF...

Page 360: ...unter C 87C0H to 87FFH C0 to 255 Coil of timer T 9C00H to 9C3FH T0 to 255 Coil of counter C A1 A2 A2 S1 A3 A1N A2N A2NS1 A3N A3V A2C A52G A0J2H A73 A1S A1S S1 A1SJ A1SJ S3 A2S A2S S1 A1SH A1SJH A2SH A...

Page 361: ...55 Present value of counter C 9A00H to 9BFFH C0 to 255 Special register D 9D00H to 9EFFH D9000 to 9255 Accumu lator A0 1 9FF8H to 9FFAH A0 A1 Index Z V A1 A2 A2 S1 A3 A1N A2N A2NS1 A3N A3V A2C A52G A0...

Page 362: ...read write Stores device ON OFF data in one bit locations 0 indicates OFF and 1 ON Example M0 to 47 are as follows 8200H 8202H 8204H Odd area Even area 8000H 8002H 8004H Stores ON OFF data from an in...

Page 363: ...879FH T0 to 255 Counter C contact 87C0H to 87DFH C0 to 255 Timer T coil 9C00H to 9C1FH T0 to 255 Counter C coil A3H A3M 9C40H to 9C5FH C0 to 255 Stores PC operation results and allows read write 8400...

Page 364: ...97FFH W0 to 3FF Timer T present value 9800H to 99FFH T0 to 255 Counter C present value 9A00H to 9BFFH C0 to 255 Special register D 9D00H to 9EFFH D9000 to 9255 Accumu lator A0 1 9FF8H to 9FFAH A0 A1...

Page 365: ...ents x 16 bytes 1K bytes File register capacity Number of file registers x 2 bytes Use 1024 bytes in place of 1K bytes in calculation mentioned above Extension register R block NO 1 to 9 A2 A2 S1 A3 A...

Page 366: ...3V A73 A3N board Block No Head address 11 38000H 10 3C000H Memory cassette When A3MCA 16 is used Block No Head address 28 A0000 27 A4000H 26 A8000H 25 AC000H 24 B0000H 23 B4000H 22 B8000H 21 BC000H 20...

Page 367: ...t be decoded has been loaded 2 Since the memory contents have changed for some reason instruction code which cannot be decoded has been included 1 Read the error step by use of a peripheral equipment...

Page 368: ...X and ANI X are included in the instruction circuit block 2 Multiple instructions are given 3 The number of contact points in the instruction circuit block exceeds 150 4 There is no circuit block bef...

Page 369: ...processing in the CPU does not operate properly WDT ERROR Checked at the execution of END processing 22 Stop Scan time exceeds watch dog error monitor time 1 Scan time of user program has been exceede...

Page 370: ...ck the defective module consult Mitsubishi representative SP UNIT DOWN Checked at the execution of FROM and TO instructions 41 Stop When the or instruction is executed access has been made to the spec...

Page 371: ...ed again it is hardware error Therefore consult Mitsubishi representative OPERATION ERROR Checked during execution of instruction 50 Continue 1 The result of BCD conversion has exceeded the specified...

Page 372: ...ch cannot be decoded by CPU module is included in the program 1 Memory cassette including instruction code which cannot be decoded has been loaded 2 Since the memory contents have changed for some rea...

Page 373: ...device number of X in the instruction circuit block exceeds X7FE 5 There is no circuit block before the instruction circuit block 6 The device number of D1 of the instruction is different from that of...

Page 374: ...engthened due to instantaneous power failure which occurred during scan 1 Calculate and check the scan time of user program and reduce the scan time using the instruction or the like 2 Monitor the con...

Page 375: ...modules are installed for a single CPU module 2 Two or more MELSECNET II MELSECNET B or MELSECNET 10 data link modules are installed 3 Two or more interrupt modules are installed 4 A special function...

Page 376: ...hout designation of the capacity of the file register Use the peripheral device to read and correct the error step in the program Check the setting range of the device BCD conversion value and so on 5...

Page 377: ...ROM if it contains instruction codes which cannot be decoded If it does replace it with a correct ROM 102 Index qualification is specified for a 32 bit constant Read the error step using a peripheral...

Page 378: ...tus latch sampling trace and extension file registers exceeds capacity of the memory cassette 113 Latch range set by parameters or setting of M L or S is incorrect 114 Sum check error 115 Either of se...

Page 379: ...the program and executed though the instruction was not given 3 Nesting level of the and instructions is 6 levels or deeper and the 6th level was executed 4 There is no or instruction at execution of...

Page 380: ...cuits in the instructions 3 The check condition circuits in the instructions are written without using X and Y contact instructions or compare instructions 4 The check pattern circuits of the instruct...

Page 381: ...n correctly 215 Hardware inside the CPU does not function in the END process check of the CPU WDT ERROR Checked at execution of END processing 22 STOP Scan time is longer than the WDT time 1 Scan time...

Page 382: ...to the data I O head number Or monitor special registers D9100 to D9107 using a peripheral device and replace the fuse of the output module of which corresponding data bit is 1 CONTROL BUS ERR 40 401...

Page 383: ...ction modules except the interrupt module which can execute interruption to the CPU module loaded Reduce the special function modules except the interrupt module which can execute interrupt start to 8...

Page 384: ...truction 50 501 Stop or Continue set by parameter 1 When file registers R are used operation is executed outside of specified ranges of device numbers and block numbers of file registers R 2 File regi...

Page 385: ...USY signal or D9081 number of vacant areas in the communication request registration areas when the instruction is executed to a remote terminal 3 Execute the instruction after execution of the instru...

Page 386: ...orrect the program of the step 2 Check the ROM if it contains instruction codes which cannot be decoded If it does replace it with a correct ROM 102 Index qualification is specified for a 32 bit const...

Page 387: ...er of settings of the remote RUN PAUSE contact point by parameters operation mode at occurrence of error annunciator indication mode or STOP RUN indication mode is incorrect 116 The MNET MINI automati...

Page 388: ...included in the program and executed though the instruction was not given 3 Nesting level of the and instructions is 6 levels or deeper and the 6th level was executed 4 There is no or instruction at...

Page 389: ...circuits in the instructions 3 The check condition circuits in the instructions are written without using X and Y contact instructions or compare instructions 4 The check pattern circuits of the inst...

Page 390: ...n extended due to certain conditions 2 Scan time has been extended due to momentary power failure occurred during scanning 1 Calculate and check the scan time of user program and reduce the scan time...

Page 391: ...base module replace and check defective module s Consult Mitsubishi representative for defective modules 402 If parameter I O assignment is being executed special function modules are not accessible...

Page 392: ...ne CPU module Reduce the computer link modules to 6 or less 445 There are 2 or more interrupt modules loaded Reduce the interrupt modules to 1 or less 446 Modules assigned by parameters for MNT MINI a...

Page 393: ...g at a peripheral device for some reason the data written to the link parameter area differs from the link parameter data read by the CPU Alternatively no link parameters have been written 2 The total...

Page 394: ...t written from a peripheral device differ from the actual network system 2 The link parameters for the second link unit have not been written 3 The setting for the total number of stations is 0 475 Wh...

Page 395: ...is not a local station 2 Head I O number specified by the instructions is not of a remote station 506 Head I O number specified by the instructions is not of a special function module 507 1 When the A...

Page 396: ...device and correct the program meeting loaded conditions of remote terminal modules 2 Use special register D9081 number of empty entries in mailbox or special relay M9081 BUSY signal of mail box to su...

Page 397: ...d name 106 Index qualification using Z or V is included in the program between and 107 1 Index qualification is specified for the device numbers and set values in the OUT instruction of timers and cou...

Page 398: ...me pointer numbers provided at the head of jump destination 132 Label of the pointer P specified in the or instruction is not provided before the instruction Read the error step using a peripheral dev...

Page 399: ...ct instructions or compare instructions 4 The check pattern circuits of the instructions are written with 257 or more steps CAN T EXECUTE I Checked at occurrence of interrupt 15 151 STOP The instructi...

Page 400: ...due to momentary power failure occurred during scanning 1 Check the scan time of the user s program and shorten it using the instructions 2 Monitor contents of special register D9005 using a periphera...

Page 401: ...digits of the special function module that caused error is stored at D9010 403 Hardware failure 405 1 The expansion cable is not properly connected 2 QA1S base failure The base information is differen...

Page 402: ...ecial function modules which can use dedicated instructions is larger than the specified limit Total of the number of computers shown below is larger than 1344 A1SJ71C24 R2 PRF R4 10 A1SJ71UC24 10 A1S...

Page 403: ...he network refresh parameters have not been written 3 The head I O number of the network parameters is incorrect 471 When using MELSECNET 10 1 The transfer source device range and transfer destination...

Page 404: ...k unit have not been written 3 The setting for the total number of stations is 0 477 A link parameter error was detected by the CC Link module OPERATION ERROR Checked at execution of instruction 50 50...

Page 405: ...fied by the instruction 4 The number of CC Link dedicated command executed in one scan exceeded 10 1 Read the error step using a peripheral device and correct the program meeting loaded conditions of...

Page 406: ...ed Remains on if normal status is restored Dedicated to AnA A2AS AnU and QCPU A A Mode 1 M9005 AC DOWN detection OFF AC power good ON AC power DOWN Turned on when an momentary power failure of 20 msec...

Page 407: ...set request OFF No processing ON Set requested Writes clock data from D9025 D9028 to the clock element after the END instruction is executed during the scan in which M9025 has changed from off to on...

Page 408: ...f M9040 is on PAUSE mode is set and M9041 is turned on Usable with all types of CPU M9041 PAUSE status contact OFF Not during pause ON During pause M9042 Stop status contact OFF Not during stop ON Dur...

Page 409: ...ion execution disable OFF Enable ON Disable Switched on to disable the instruction Switched on when program transfer is requested and automatically switched off when transfer is complete Usable with A...

Page 410: ...vided processing Turned on when canvas screen transfer to AD57 S1 AD58 is done by divided processing and turned off at completion of divided processing Usable with AnA and AnU 2 M9066 Transfer process...

Page 411: ...st for writing to flash ROM OFF ON Starts writing to ROM When turned from OFF to ON writing to the built in ROM is started Dedicated to QCPU A A Mode M9075 Test mode flag OFF Other than test mode ON T...

Page 412: ...ng error flag OFF No data error ON Data error Turned on when the positioning data of the servo program designated by the instruction has an error Turned off when the data has no error after the instru...

Page 413: ...A3M M9087 BASIC program PAUSE flag OFF A3M BASIC RUN enable ON A3M BASIC disable Specifies enable disable of A3M BASIC execution when the A3MCPU is in PAUSE state OFF A3M BASIC is executed ON A3M BASI...

Page 414: ...to the A3VCPU A Dedicated to A3V M9098 A3VCPU C selfcheck error OFF No error ON Error Turn on when a self check error occurred on the A3VCPU C mounted next to the A3VCPU B Dedicated to A3V M9099 A3VT...

Page 415: ...consecutive transfer is not executed with consecutive transfer enabled Turned off when transfer of one step is completed Consecutive transfer of a step can be prevented by writing an AND condition to...

Page 416: ...nA AnU A2AS QCPU A A Mode A2C A0J2H AnS AnSH A1FX and A52G 2 M9196 Operation output at block stop OFF Coil output off ON Coil output on Selects the operation output when block stop is executed ON Reta...

Page 417: ...eset forcibly For the operation procedure refer to the manuals for peripheral devices c By moving the RESET key switch on the CPU front to the RESET position the special relays are turned off 3 Specia...

Page 418: ...he LWTP nstruction Use the RST instruction to reset M9203 LWTP instruction complete OFF Incomplete ON Complete Depends on whether or not the LWTP word device write instruction execution is complete Us...

Page 419: ...detected Depends on whether or not a local or a remote I O station has detected any link parameter error in the master station M9236 Local or remote I O station initial communicating status OFF Nonco...

Page 420: ...r or not loopback is occurring at the local station M9246 Data unreceived OFF Received ON Unreceived Depends on whether or not data has been received from the master station M9247 Data unreceived OFF...

Page 421: ...dicated to A0J2H I O Module for A0J2 Extension Base Unit Setting Switch Stored Data Base Unit Slot No Stored Data 0 1 0 5 1 2 1 6 2 3 2 7 3 4 3 8 4 5 5 6 6 7 7 8 In case of remote I O station module I...

Page 422: ...l types of CPUs D9009 Annunciator detection F number at which external failure has occurred When one of F0 to 255 is turned on by or the F number which has been detected earliest among the F numbers w...

Page 423: ...n the contents of D9010 cannot be renewed unless M9011 is cleared by user program Usable with all types of CPUs D9014 I O control mode I O control mode number The I O control mode set is returned in a...

Page 424: ...n the content of D9017 the value is newly stored at each END Namely the minimum value of scan time is stored into D9017 in BIN code Usable with all types of CPUs D9018 Scan time Scan time per 10 ms Sc...

Page 425: ...data Minute second Stores the Minute and second in BCD 2 D9028 Clock data Clock data day of the week Stores the day of the week in BCD Unusable with An A3H A3M A3V A2C and A0J2H Year Month Example 19...

Page 426: ...orms to the MINI standard protocol or remote terminal unit 1 No protocol mode of AJ35PTF R2 Data configuration D9035 Extension file register Use block No Stores the block No of the extension file regi...

Page 427: ...044 is turned on or off with the peripheral device to start sampling trace or At scanning 0 At time Time 10 ms unit Stores the value in BIN code for D9044 Usable with A1 and A1N D9049 SFC program exec...

Page 428: ...e D9060 Software version Software version of internal system Stores the software version of the CPU module s internal system in ASCII codes Example Stores 41H for version A Note The software version o...

Page 429: ...its showing the minute and second are stored to D9075 in BCD codes as shown below Dedicated to A2CCPUC24 PRF D9076 Clock data Clock data day of the week Two day of the week is stored to D9076 in BCD c...

Page 430: ...d in July 1999 D9081 Number of vacant registration areas for communication requests 0 to 32 Stores the number of vacant registration areas for communication requests executed to remote terminal module...

Page 431: ...and the A3VCPU Dedicated to A3V Dip switch information Dip switch information Dip switch information of CPU module is stored as follows 0 ON 1 OFF Usable wtih QCPU A A mode only D9096 A3VCPU A Self c...

Page 432: ...odule number of the fuses have blown in the bit pattern Dedicated to A0J2H 2 D9108 Step transfer monitoring timer setting Timer setting value and the F number at time out Sets value for the step trans...

Page 433: ...ected this register indicates the bit pattern of the I O module number Dedicated to A0J2H D9124 Annunciator detection quantity Annunciator detection quantity When one of F0 to 255 F0 to 2047 for AnA a...

Page 434: ...on number Information of I O modules and remote terminal modules is for input output and remote terminal module identification and expressed as 2 bit data 00 No I O module or remote terminal module or...

Page 435: ...rminal modules is as shown below Retry counter uses 8 bits for one station n is determined by station number of I O module or remote terminal module Odd number stations b0 to b7 n 0 Even number statio...

Page 436: ...es D9174 Setting of the number of retries Number of retries Sets the number of retries executed to I O modules and remote terminal modules which caused communication error Set for 5 times at power on...

Page 437: ...amplifier connection state is checked and the result is stored in the bit which corresponds to each axis number Connection state is continuously checked Axes which changed from disconnected state to c...

Page 438: ...e Bit pattern of the axis connected to a general purpose servo amplifier Stores type of connected servo amplifier in the bit which corresponds to each axis number 0 MR SB MR SD MR SB K is connected or...

Page 439: ...register to 0 by changing the present value by the test function of peripheral equipment or set to 0 by forced reset For the operation procedure refer to the Instruction Manual for peripheral equipme...

Page 440: ...n constant source and or destination One of the stations is not communicating The specified station is a remote I O station D9201 LWTP processing result 0 Normal 2 LWTP instruction setting fault 3 Cor...

Page 441: ...utput Y link relay B and link register W assigned in link parameters communicate with the corresponding stations every link scan Link scan is a period of time during which data link is executed with a...

Page 442: ...tects a parameter error or a remote station contains an invalid I O assignment the bit corresponding to the station number becomes 1 Example When local station 5 and remote I O station 14 detect an er...

Page 443: ...oop error Stores the status of stations 25 to 32 D9236 Local or remote I O station loop error Stores the status of stations 33 to 40 D9237 Local or remote I O station loop error Stores the status of s...

Page 444: ...s the status of stations 33 to 48 D9251 Local station operating status Stores the status of stations 49 to 64 D9252 Local station error Stores the status of stations 1 to 16 Stores the local station n...

Page 445: ...s follows Sequence program processing time instruction processing time END processing time refresh processing time Obtained from the list END processing time END instruction processing time T C proces...

Page 446: ...er of digits specified for the devices used with any basic or application instruction is not K4 or K8 and or the device number specified is not 0 or a multiple of 8 0 or a multiple of 16 when the A3H...

Page 447: ...cution time 1 0 1 0 0 33 0 33 0 25 0 25 Unexecuted 0 0 0 0 0 0 After time out 11 11 7 2 9 6 20 0 18 0 K 24 24 12 0 12 8 22 0 22 0 T Processing time at the execution of END instruction Exe cuted Added...

Page 448: ...09 0 0 0 0 0 After time out 4 5 2 05 14 11 14 14 20 0 K 7 7 3 50 30 24 30 30 22 0 T Processing time at the execution of END instruction Exe cuted Added D 8 3 3 77 37 30 37 37 24 0 Instruction executio...

Page 449: ...4 8 4 6 2 6 2 Unexecuted 3 6 3 0 1 4 1 4 1 0 1 0 OFF OFF 8 5 OFF OFF 8 4 F Executed 296 283 73 2 75 3 ON OFF 57 1 ON OFF 57 1 Unexecuted 3 0 3 0 1 4 1 4 1 0 1 0 OFF OFF 8 3 OFF OFF 8 3 T C Executed 4...

Page 450: ...6 2 Unexecuted 2 0 0 91 3 0 3 0 3 0 3 0 1 0 39 66 OFF OFF 8 5 F Executed 150 67 09 596 447 596 596 ON OFF 57 1 Unexecuted 1 4 0 64 3 0 3 0 3 0 3 0 1 0 OFF OFF 8 3 T C Executed 5 6 2 55 54 43 54 54 ON...

Page 451: ...9 10 2 10 2 7 6 10 0 CJ With index qualification 48 48 12 6 12 6 9 5 11 9 Without index qualification 71 71 17 8 17 7 13 3 13 3 SCJ With index qualification 81 81 20 2 20 5 15 1 15 1 JMP 39 39 10 2 10...

Page 452: ...qualification 6 6 3 08 49 39 49 49 10 0 CJ With index qualification 6 6 3 08 60 48 60 60 11 9 Without index qualification 6 6 3 08 89 71 89 89 13 3 SCJ With index qualification 6 6 3 08 101 81 101 101...

Page 453: ...ndicates that the input condition remains on and the counter does not count 3 OFF of PLS and PLF instructions indicates that the input condition remains on 1 scan after it has turned on off for PLF an...

Page 454: ...129 214 34 4 34 6 25 9 25 9 LD 67 67 84 18 8 19 0 14 3 14 3 AND 60 60 79 17 0 17 4 12 7 12 9 OR 66 65 83 17 2 17 6 12 9 12 9 LDD 133 133 219 36 4 36 2 27 5 27 3 ANDD 131 131 217 38 5 36 4 27 1 27 1 O...

Page 455: ...161 161 268 25 9 LD 4 1 1 91 84 67 84 84 106 14 3 AND 2 6 1 45 75 60 75 75 99 12 7 OR 2 8 2 00 83 66 83 81 104 12 9 LDD 9 7 5 18 166 133 166 167 274 27 5 ANDD 5 8 4 64 164 131 164 164 272 27 1 1 99 O...

Page 456: ...6 D S D 69 69 90 18 0 18 5 13 7 13 6 D P S D 69 69 90 18 0 18 7 13 6 13 2 S1 S2 D 79 79 107 20 8 21 3 15 7 15 6 P S1 S2 D 79 79 107 20 8 21 3 15 8 15 6 D S1 S2 D 99 99 130 27 0 25 7 20 3 20 4 D P S1 S...

Page 457: ...57 74 8 6 D S D 4 0 1 82 86 69 86 87 113 13 7 D P S D 4 0 1 82 86 69 86 87 113 13 6 S1 S2 D 3 2 1 45 99 79 99 99 134 15 7 P S1 S2 D 3 2 1 45 99 79 99 99 134 15 8 D S1 S2 D 4 6 2 09 124 99 124 124 163...

Page 458: ...46 8 47 3 35 3 35 0 DB P S D 175 175 280 46 8 47 3 35 1 35 0 B S1 S2 D 133 133 203 36 2 36 9 27 3 27 0 B P S1 S2 D 133 133 203 36 2 36 7 27 1 27 0 DB S1 S2 D 185 186 294 50 4 50 6 38 1 37 8 DB P S1 S...

Page 459: ...2 14 09 219 175 219 219 351 35 3 DB P S D 32 14 09 219 175 219 219 351 35 1 B S1 S2 D 14 6 18 166 133 166 167 254 27 3 B P S1 S2 D 14 6 18 166 133 166 167 254 27 1 DB S1 S2 D 29 12 82 231 185 231 233...

Page 460: ...87 17 2 17 7 13 1 13 0 DMOVP 67 67 87 17 2 17 9 13 1 13 0 XCH 60 61 84 15 8 16 3 11 9 11 8 XCHP 60 61 84 15 8 16 3 11 9 11 8 DXCH 107 107 141 28 8 29 5 21 7 21 6 DXCHP 107 107 141 28 8 29 1 21 7 21 8...

Page 461: ...P 2 4 1 09 54 43 54 54 72 8 3 DCML 3 2 1 45 93 74 93 94 136 15 1 DCMLP 3 2 1 45 93 74 93 94 136 15 3 BMOV S D n n 96 72 32 73 499 399 499 501 8931 44 4 BMOVP S D n n 96 72 32 73 499 399 499 501 8931 4...

Page 462: ...27 2 DORP 140 139 240 36 4 36 9 27 3 27 2 WOR S1 S2 D 97 96 152 25 8 26 1 19 3 19 2 WORP S1 S2 D 97 96 152 25 8 26 3 19 3 19 2 WXOR S D 60 59 72 15 4 15 5 11 5 11 4 WXORP S D 60 59 72 15 4 15 5 11 5...

Page 463: ...00 27 3 DORP 13 5 74 174 140 174 173 300 27 3 WOR S1 S2 D 7 6 3 47 121 97 121 120 190 19 3 SORP S1 S2 D 7 6 3 47 121 97 121 120 190 19 3 WXOR S D 2 8 1 29 74 60 74 73 90 11 5 WXORP S D 2 8 1 29 74 60...

Page 464: ...3 18 4 17 5 13 7 13 8 SFRP D n n 5 74 72 83 18 4 18 9 13 7 13 8 n 5 124 123 124 31 6 31 7 23 7 23 8 BSFR D n n 15 33 6 33 9 25 1 25 2 n 5 124 123 124 31 6 31 9 23 5 23 5 BSFRP D n n 15 33 6 33 9 25 3...

Page 465: ...85 14 1 SFR D n n 5 5 0 2 1 92 74 92 90 103 13 7 SFRP D n n 5 5 0 2 1 92 74 92 90 103 13 7 n 5 29 13 09 154 124 154 153 155 23 7 BSFR D n n 15 25 1 n 5 29 13 09 154 124 154 153 155 23 5 BSFRP D n n 15...

Page 466: ...n 1 154 153 37 6 37 9 28 1 28 4 ASC 120 120 120 30 7 30 7 23 1 23 0 FIFW 101 101 123 69 0 69 3 55 3 55 2 FIFWP 101 10 123 27 2 43 3 20 5 20 4 FIFR 118 118 134 53 8 54 3 40 3 40 3 FIFRP 118 118 134 82...

Page 467: ...n 1 25 11 37 192 154 192 191 28 1 ASC 3 4 1 55 150 120 150 150 150 23 1 FIFW 20 9 19 126 101 126 126 154 55 3 FIFWP 20 9 19 126 101 126 126 154 20 5 FIFR 69 32 45 147 118 147 147 167 40 3 FIFRP 69 32...

Page 468: ...1561 5 878 7 1381 3 SLT Device memory R 24598 24598 24598 3314 5 3787 5 2480 7 3035 3 SLTR 29 29 29 7 6 7 7 5 8 5 8 STRA 30 30 30 7 5 7 5 5 7 5 6 STRAR 28 28 28 7 1 7 2 5 4 5 4 STC 28 28 28 7 1 7 2 5...

Page 469: ...324 9 10560 8448 10560 10560 10560 878 7 SLT Device memory R 9996 4543 2 30747 24598 30747 30747 30747 2480 7 SLTR 6 6 3 0 37 29 37 37 37 5 8 STRA 5 0 2 27 38 30 38 38 38 5 7 STRAR 5 0 2 27 35 28 35 3...

Page 470: ...4584 7 1257 6 n 1 449 529 161 9 211 6 141 8 183 6 DFROP n 500 56 6609 2109 4012 5 773 6 4632 7 1257 6 n 1 449 539 152 4 190 6 135 0 162 6 TO n 1000 112 6609 3918 3882 5 1827 6 4568 7 1587 6 n 1 449 53...

Page 471: ...549 655 131 7 n 1000 112 5749 2789 4085 1297 8261 2948 4576 7 AD61C 435 AJ35PTF R2 n3 1 228 FROM FROMP AJ35PTF R2 n3 500 1415 n 1 244 266 183 5 189 8 561 661 141 8 n 500 56 5669 1669 4086 951 2 8261 2...

Page 472: ...uring the following time An A2C and A0J2H Number of steps 1 x 1 25 s AnN AnS A3V A73 and A3N board Number of steps 1 x 1 0 s A1SH A1SJH Number of steps 1 x 0 33 s A2SH S1 A1FX Number of steps 1 x 0 25...

Page 473: ...2 0 40 0 30 Unexecuted 1 3 0 38 for A3V 0 0 0 0 23 0 18 After time out 15 11 11 3 7 3 7 4 5 3 3 K 30 24 24 5 9 5 9 7 7 5 7 T Processing time at the execution of END instruction Exe cuted Added D 36 30...

Page 474: ...150 115 Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 T C Executed 57 43 43 5 2 5 2 5 6 4 2 Unexecuted 3 7 3 0 3 0 0 80 0 80 1 4 1 1 D W A0 A1 V Z Executed 34 28 28 0 80 0 80 8 4 6 3 Unexecuted 3 7 3 0 3...

Page 475: ...0 6 6 5 0 SCJ With index qualification 81 81 7 2 7 2 6 6 5 0 JMP 50 39 39 3 8 3 8 6 6 5 0 Without index qualification 74 74 A3V 69 7 74 8 2 8 2 10 7 8 CALL With index qualification 78 78 12 12 10 7 8...

Page 476: ...ndicates that the input condition remains on and the counter does not count 3 OFF of PLS and PLF instructions indicates that the input condition remains on 1 scan after it has turned on off for PLF an...

Page 477: ...4 2 6 2 0 OR 98 66 65 83 3 2 3 2 11 2 8 2 1 LDD 238 133 133 219 158 158 181 9 7 7 3 ANDD 240 131 131 217 158 158 181 5 8 4 4 ORD 236 131 130 219 161 161 184 6 0 4 5 LD 100 71 71 88 2 8 2 8 10 4 1 3 1...

Page 478: ...9 130 3 0 3 0 26 4 6 3 5 S1 S2 D 135 94 95 168 2 4 2 4 18 3 4 2 6 P S1 S2 D 135 94 95 168 2 4 2 4 18 3 4 2 6 D S1 S2 D 429 341 340 370 18 18 41 20 15 D P S1 S2 D 429 341 340 370 18 18 41 20 15 S1 S2 D...

Page 479: ...2 D 422 235 236 274 25 25 40 11 8 0 DB S1 S2 D 998 896 894 954 748 748 793 62 47 DB P S1 S2 D 998 896 894 954 748 748 793 62 47 BCD 110 82 83 90 1 6 1 6 9 2 3 0 2 3 BCDP 110 82 83 90 1 6 1 6 9 2 3 0 2...

Page 480: ...D n n 96 1118 229 228 1029 66 66 435 32 24 FMOVP S D n n 96 1118 229 228 1029 66 66 435 32 24 R Refresh mode D Direct mode POINTS 1 All the basic instructions indicated above are used without index q...

Page 481: ...WOR S1 S2 D 176 97 96 152 21 21 32 7 6 5 7 WORP S1 S2 D 176 97 96 152 21 21 32 7 6 5 7 WXOR S D 91 60 59 72 1 6 1 6 9 2 2 8 2 1 WXORP S D 91 60 59 72 1 6 1 6 9 2 2 8 2 1 DXOR 274 140 139 240 27 27 43...

Page 482: ...68 68 68 13 13 13 12 8 7 DRCLP n n 5 98 68 68 68 13 13 13 12 8 7 SFR D n n 5 102 74 72 83 4 0 4 0 7 8 5 0 3 8 SFRP D n n 5 102 74 72 83 4 0 4 0 7 8 5 0 3 8 BSFR D n n 5 145 124 123 124 116 116 154 29...

Page 483: ...4 153 155 155 25 19 ASC 140 120 120 120 107 107 107 3 4 2 6 FIFW 340 101 101 123 136 136 140 20 15 FIFWP 340 101 101 123 136 136 140 20 15 FIFR 202 118 118 134 207 207 211 69 52 FIFRP 202 118 118 134...

Page 484: ...3 53 6 6 5 0 STRA 30 30 30 52 52 52 5 0 3 8 STRAR 28 28 28 52 52 52 5 0 3 8 STC 28 28 28 1 2 1 2 1 2 2 4 1 8 CLC 31 31 31 1 2 1 2 1 2 2 4 1 8 DUTY 68 68 68 121 121 121 14 11 PR 226 226 226 183 183 183...

Page 485: ...0 410 520 240 266 180 199 DTO DTOP n 500 6609 1609 19340 5050 5120 2200 5747 1501 4310 1126 R Refresh mode D Direct mode The processing time shown above is the value when the AD71 is used as special f...

Page 486: ...M except for special M L S B At change OFF ON ON OFF 0 158 0 068 Special M 0 316 0 136 At no execution 1 11 0 480 F At execution 35 1 15 1 Instruction execution time 0 158 0 068 Time for no execution...

Page 487: ...068 At no execution 0 316 0 136 Special M B At execution 0 316 0 136 At no execution 0 798 0 343 F At execution 37 7 16 3 At no execution 0 561 0 242 T C At execution 2 24 0 962 At no execution 0 561...

Page 488: ...alification 2 72 1 17 CJ With index qualification 2 72 1 17 Without index qualification 2 72 1 17 SCJ With index qualification 2 72 1 17 JMP 2 72 1 17 Without index qualification 6 81 2 93 CALL With i...

Page 489: ...50 ORD 4 43 1 91 LD 1 92 0 829 AND 1 28 0 553 OR 1 76 0 758 LDD 4 26 1 84 ANDD 3 49 1 51 ORD 4 18 1 80 LD 1 92 0 829 AND 1 28 0 553 OR 1 76 0 758 LDD 4 26 1 84 ANDD 3 49 1 51 ORD 4 18 1 80 LD 1 92 0...

Page 490: ...688 D P S D 1 60 0 688 S1 S2 D 1 27 0 548 P S1 S2 D 1 27 0 548 D S1 S2 D 1 83 0 790 D P S1 S2 D 1 83 0 790 S1 S2 D 1 36 0 586 P S1 S2 D 1 36 0 586 D S1 S2 D 7 97 3 43 D P S1 S2 D 7 97 3 43 S1 S2 D 4...

Page 491: ...8 2 40 DB S1 S2 D 35 5 15 3 DB P S1 S2 D 35 5 15 3 B S1 S2 D 4 38 1 89 B P S1 S2 D 4 38 1 89 DB S1 S2 D 24 7 10 7 DB P S1 S2 D 24 7 10 7 BCD 1 19 0 51 BCDP 1 19 0 51 DBCD 5 18 2 23 DBCDP 5 18 2 23 BIN...

Page 492: ...All the basic instructions indicated above are used without index qualification 2 When unexecuted any instruction is processed during the following time Q02CPU A Number of steps 1 0 079 s Q02HCPU A Q...

Page 493: ...ANDP 5 18 2 23 WAND S1 S2 D 3 03 1 30 WANDP S1 S2 D 3 03 1 30 WOR S D 1 11 0 480 WORP S D 1 11 0 480 DOR 5 18 2 23 DORP 5 18 2 23 WOR S1 S2 D 3 03 1 30 WORP S1 S2 D 3 03 1 30 WXOR S D 1 11 0 480 WXORP...

Page 494: ...n n 5 2 55 1 10 DROR n n 5 4 38 1 89 DRORP n n 5 4 38 1 89 DRCR n n 5 4 78 2 06 DRCRP n n 5 4 78 2 06 DROL n n 5 3 99 1 72 DROLP n n 5 3 99 1 72 DRCL n n 5 4 78 2 06 DRCLP n n 5 4 78 2 06 SFR D n n 5...

Page 495: ...D n n 2 15 2 6 54 ENCOP S D n n 2 15 2 6 54 BSET D n n 5 3 82 1 65 BSETP D n n 5 3 82 1 65 BRST D n n 5 3 82 1 65 BRSTP D n n 5 3 82 1 65 UNI S D n n 4 12 4 5 32 UNIP S D n n 4 12 4 5 32 DIS S D n n 4...

Page 496: ...UTY 5 58 2 40 PR 29 5 12 7 PRC 14 7 6 35 CHK LED LEDA LEDB LEDR 41 8 18 0 n3 1 X Y 180 143 n3 Other than 1 X or Y 170 141 n3 112 X Y 1117 761 FROM FROMP n3 Other than 1000 X or Y 3346 3161 n3 1 X Y 18...

Page 497: ...3 3 C S c s 0 1 0 0 4 TC4 EOT DC4 4 D T d t 0 1 0 1 5 TC5 ENQ TC8 NAK 5 E U e u 0 1 1 0 6 TC6 ACK TC9 SYN 6 F V f v 0 1 1 1 7 BEL TC10 ETB 7 G W g w 1 0 0 0 8 FE0 BS CAN 8 H X h x 1 0 0 1 9 FE1 HT EM...

Page 498: ...li cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No CHECKED BY PREPARED BY SHEET NO 1 I O MODUL...

Page 499: ...O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No Appli cation I O No CHECKED BY PREPARED BY SHEET NO 2 Base connecter type name I O MODULE0 I O...

Page 500: ...APPENDICES APP 95 MELSEC A Sheet format 1 3 CHECKED BY PREPARED BY SHEET NO Step Number Instruction Device Remarks 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 MELSEC A CODING SHEET...

Page 501: ...eet format 1 4 CHECKED BY PREPARED BY SHEET NO Signal Description Signal Description 0 2 1 3 2 4 3 5 4 6 5 7 6 8 7 9 8 0 9 1 0 2 1 3 2 4 3 5 4 6 5 7 6 8 7 9 8 0 9 1 0 2 1 3 2 4 3 5 4 6 5 7 6 8 7 9 8 9...

Page 502: ...SEC A Sheet format 1 5 CHECKED BY PREPARED BY SHEET NO Data 16 bits data Description Data 16 bits data Description 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 MELSE...

Page 503: ...heet format 1 6 CHECKED BY PREPARED BY SHEET NO Failure Type Condition Troubleshooting Point Failure Memory Number External Failure Name F 0 1 2 3 4 5 6 7 8 9 F 0 1 2 3 4 5 6 7 8 9 F 0 1 2 3 4 5 6 7 8...

Page 504: ...9 MELSEC A Sheet format 1 7 CHECKED BY PREPARED BY SHEET NO Number Set Value K Description Application Operation Count Input etc 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 MELSEC A TI...

Page 505: ...APPENDICES APP 100 MELSEC A MEMO...

Page 506: ...voided if functions or structures judged as necessary in the legal safety measures the user s device is subject to or as necessary by industry standards had been provided 4 Failure that could have bee...

Page 507: ......

Page 508: ......

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