5. SEQUENCE INSTRUCTIONS
5
−
9
MELSEC-A
5.2.2 Operation result push, read, pop
(MPS, MRD, MPP)
Available Device
Bit device
Word (16-bit) device
Constant
Pointer Level
Ca
rr
y
fla
g
Err
o
r
fla
g
X Y M L S B F T C D W R A0
A1 Z V K H P I N
D
igit specification
Inde
x
M9012 (M9010, M9011)
Functions MPS
(1) Stores the operation result (ON/OFF) immediately preceding the MPS
instruction.
(2) The MPS instruction can be used up to the number of times mentioned below.
For AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board
: 16 times
For CPUs other than AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board
: 12 times
However, it can be used 11 times consecutively in ladder mode. If an MPP
instruction is used in between, 1 is reduced from the number of used MPS
instructions.
MRD
(1) Reads the operation result stored by the MPS instruction, and resumes the
operation with that operation result, starting at the next step.
Applicable
CPU
All CPUs
MPS
MRD
MPP
When the ladder is dispiayed, MPS, MRD, and MPP
are omitted.
Summary of Contents for MELSEC-A series
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