6. BASIC INSTRUCTIONS
6
−
56
MELSEC-A
6.4.4 16-, 32-bit data exchange
(XCH, XCHP, DXCH, DXCHP)
Available Device
Bit device
Word (16-bit) device
Constant
Pointer
Level
Ca
rr
y
fla
g
Err
o
r
fla
g
X Y M L S B F T C D W R A0
A1
Z V K H P I N
D
igit specification
In
d
e
x
M9012 (M9010, M9011)
(D1)
O O O O O O O O O O O O O O O
XCH
(D2)
O O O O O O O O O O O O O O O
K1
to
K4
(D1)
O O O O O O O O O O O O O
DXCH
(D2)
O O O O O O O O O O O O O
K1
to
K8
O
O
Functions XCH
Interchanges the 16-bit data of (D1) and (D2).
DXCH
Interchanges the 32-bit data of (D1) and (D2).
Applicable
CPU
All CPUs
Before execution
After execution
Before execution
After execution
(D1)
(D2)
Head number of device
which stores data to be
interchanged
Setting data
XCH, DXCH
Indicates the instruction symbol.
(D1)
(D2)
(D1)
(D2)
Interchange commands
P
Summary of Contents for MELSEC-A series
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