Mitsubishi MELSEC-A series, Programming Manual

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7. APPLICATION INSTRUCTIONS
7
−
124
MELSEC-A
7.10.2 Specific format failure check (CHK)
The CHK instruction varies in function with I/O control mode as shown below.
I/O control mode
CPU
Direct mode
Refresh mode
(when either or both of input and
output are in refresh mode)
An Failure check

AnN, AnS, AnSH,
A1FX, A0J2H,
A73, A3N board
Failure check Bit device output reverse
A3H, A3M Failure check Failure check
A3V, AnA, A2C,
A52G, AnU, A2AS,
QCPU-A (A Mode),
A2USH board

Failure check
For bit device output reverse, refer to Section 5.3.4.
With the AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board failure check which
allows format specification can be performed using dedicated instructions. For
details, refer to the AnSHCPU/AnACPU/AnUCPU Programming Manual (Dedicated
Instructions).
Available Device
Bit device Word (16-bit) device Constant Pointer Level
Ca
rr
y
fla
g
Err
o
r
fla
g
X Y M L S B F T C D W R A0 A1 Z V K H P I N
D
igit specification
Inde
x
M9012 (M9010, M9011)
(D1) O O O O O O
(D1) O O O O O O O O O O O O O O O K4
*1: For the number of steps when A ACPU is used, refer to Section 3.8.1.
AnS
AnN
AnSH
An A1FX
A3H
A3M
A3V AnA
AnU, A2AS
A2USH-S1
A2USH board
QCPU-A
(A Mode)
A0J2H
A2C
A52G
A73
A3N
board Applicable
CPU
O X O O O O O
Remark * Valid only when the input/output control method is direct method.
Device specified at (D1).
Device input (X) only can be used.
Up to 150 contacts can be connected.
NO contact only is valid.
NC contact is ignored.
Check conditions
The CHK
instruc-tion
should be
provided in
pointer P254
block.
CJ P**
CHK (D1) (D2)
X X X X X
P254
P**
(D1)
The number of the device to be turned ON when
failure is detected by CHK instruction execution.
(Execution condition of the CJ instruction)
(D2)
The number of the device to store error code
when failure is detected by CHK instruction
execution.
* *
* *