2. INSTRUCTIONS
2
−
12
MELSEC-A
Table 2.11 Arithmetic Operation Instructions
Classi-
fication
Un
it
Instruction
Symbol
Symbol
Contents of Processing
Execu-
tion Con-
dition
Nu
m
b
e
r
of steps
Inde
x
S
ubset
Applicable CPU
Page
B
∗
9
●
!
6-28
B
∗
P
(S1)
×
(S2)
→
(D+1, D)
9
●
!
6-28
B/
9
●
!
6-28
BCD
4-digit
multipli-
cation,
division
B
C
D
4-di
gi
ts
B/P
(S1) / (S2)
→
Quotient (D)
|Remainder (D+1)
9
●
!
6-28
DB
∗
11
●
!
6-31
DB
∗
P
(S1+1, S1)
×
(S2+1, S2)
→
(D+3, D+2, D+1, D)
11
●
!
6-31
DB/
11
●
!
6-31
BCD
8-digit
multipli-
cation,
division
B
C
D
8-di
gi
ts
DB/P
(S1+1, S1) / (S2+1, S2)
→
Quotient (D+1, D),
Remainder (D+3, D+2)
11
●
!
6-31
INC
3
●
●
!
6-34
16 bi
ts
INCP
(D) +1
→
(D)
3
●
●
!
6-34
DINC
3
●
●
!
6-36
BIN
data
incre-
ment
32 bi
ts
DINCP
(D+1, D) +1
→
(D+1, D)
3
●
●
!
6-36
DEC
3
●
●
!
6-34
16 bi
ts
DECP
(D) -1
→
(D)
3
●
●
!
6-34
DDEC
3
●
●
!
6-36
BIN
data
decre-
ment
32 bi
ts
DDECP
(D+1, D) -1
→
(D+1, D)
3
●
●
!
6-36
*1: For the number of steps when extension devices are used or when index qualification is performed to
bit devices for AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, refer to Section 3.8.1.
*2: The mark in the Index column indicates that index qualification can be performed with the AnA,
A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*3: The mark in the Subset column indicates that subset processing can be performed with the A3H,
A3M, AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*3
*3
*3
*3
*1
Summary of Contents for MELSEC-A series
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