APPENDICES
APP
−
75
MELSEC-A
Table 2.5 Instruction Processing Time of CPUs (Continue)
Processing Time (
µ
s)
An
AnN, A3V, A73
A3N board
A3H, A3M
A2A, A2U
A3A,
A3U, A4U
D D
Instruction Condition
D R
Other
than X, Y
X, Y
R
Other
than X, Y
X, Y
R R
BMOVP S D n
n=96
7498
699
400
7144
132
132
862
72
54
FMOV S D n
n=96
1118
229
228
1029
66
66
435
32
24
FMOVP S D n
n=96
1118
229
228
1029
66
66
435
32
24
R: Refresh mode, D: Direct mode
POINTS
(1) All the basic instructions indicated above are used without index
qualification.
(2) When unexecuted, any instruction is processed during the following time:
An................................................... (Number of steps + 1) x 1.3 (
µ
s)
AnN, A3V, A73 and A3N board ...... (Number of steps + 1) x 1.0 (
µ
s)
A3H and A3M ................................ (Number of steps + 1) x 0.2 (
µ
s)
A2A and A2U .................................(Number of steps + 4) x 0.2 (
µ
s)
A3A, A3U and A4U ........................ (Number of steps + 4) x 0.15 (
µ
s)
Summary of Contents for MELSEC-A series
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